AMS-IO-Bench and AMS-IO-Agent: Benchmarking and Structured Reasoning for Analog and Mixed-Signal Integrated Circuit Input/Output Design

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📝 Original Info

  • Title: AMS-IO-Bench and AMS-IO-Agent: Benchmarking and Structured Reasoning for Analog and Mixed-Signal Integrated Circuit Input/Output Design
  • ArXiv ID: 2512.21613
  • Date: 2025-12-25
  • Authors: Zhishuai Zhang, Xintian Li, Shilong Liu, Aodong Zhang, Lu Jie, Nan Sun

📝 Abstract

In this paper, we propose AMS-IO-Agent, a domain-specialized LLM-based agent for structure-aware input/output (I/O) subsystem generation in analog and mixed-signal (AMS) integrated circuits (ICs). The central contribution of this work is a framework that connects natural language design intent with industrial-level AMS IC design deliverables. AMS-IO-Agent integrates two key capabilities: (1) a structured domain knowledge base that captures reusable constraints and design conventions; (2) design intent structuring, which converts ambiguous user intent into verifiable logic steps using JSON and Python as intermediate formats. We further introduce AMS-IO-Bench, a benchmark for wirebond-packaged AMS I/O ring automation. On this benchmark, AMS-IO-Agent achieves over 70\% DRC+LVS pass rate and reduces design turnaround time from hours to minutes, outperforming the baseline LLM. Furthermore, an agent-generated I/O ring was fabricated and validated in a 28 nm CMOS tape-out, demonstrating the practical effectiveness of the approach in real AMS IC design flows. To our knowledge, this is the first reported human-agent collaborative AMS IC design in which an LLM-based agent completes a nontrivial subtask with outputs directly used in silicon.

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AMS-IO-Bench and AMS-IO-Agent: Benchmarking and Structured Reasoning for Analog and Mixed-Signal Integrated Circuit Input/Output Design Zhishuai Zhang*1, Xintian Li*2, Shilong Liu3, Aodong Zhang1, Lu Jie2, Nan Sun1 1Department of Electrical Engineering, Tsinghua University 2School of Integrated Circuits, Tsinghua University 3Princeton AI Lab, Princeton University arcadia16zzs@gmail.com Abstract In this paper, we propose AMS-IO-Agent, a domain- specialized LLM-based agent for structure-aware input/out- put (I/O) subsystem generation in analog and mixed-signal (AMS) integrated circuits (ICs). The central contribution of this work is a framework that connects natural language de- sign intent with industrial-level AMS IC design deliverables. AMS-IO-Agent integrates two key capabilities: (1) a struc- tured domain knowledge base that captures reusable con- straints and design conventions; (2) design intent structur- ing, which converts ambiguous user intent into verifiable logic steps using JSON and Python as intermediate for- mats. We further introduce AMS-IO-Bench, a benchmark for wirebond-packaged AMS I/O ring automation. On this benchmark, AMS-IO-Agent achieves over 70% DRC+LVS pass rate and reduces design turnaround time from hours to minutes, outperforming the baseline LLM. Furthermore, an agent-generated I/O ring was fabricated and validated in a 28 nm CMOS tape-out, demonstrating the practical effective- ness of the approach in real AMS IC design flows. To our knowledge, this is the first reported human-agent collabora- tive AMS IC design in which an LLM-based agent completes a nontrivial subtask with outputs directly used in silicon. Code — https://github.com/Arcadia-1/AMS-IO-Agent Datasets — https://github.com/Arcadia-1/AMS-IO-Bench Introduction Input/output (I/O) subsystems are a fundamental component of analog and mixed-signal (AMS) integrated circuits (ICs), providing signal interfacing, power delivery, and electro- static discharge (ESD) protection. While digital I/O cells can typically be placed using scripts and routed via standard dig- ital flows, the implementation of AMS I/O remains largely manual due to intricate, project-specific requirements. These include diverse signal types, multiple power domains, power integrity constraints, sensitive analog signal routing require- ments, and layout restrictions imposed by fabrication and packaging rules. Simple scripting approaches lack the rea- soning capability to handle such complexity, leaving much of the design effort to human engineers. *These authors contributed equally. Copyright © 2026, Association for the Advancement of Artificial Intelligence (www.aaai.org). All rights reserved. Customized AMS-IC Core Full Chip Design Guide ~1-day Learning Reference Design Engineer AMS-IO-Agent ~1-day Labor Work (Non-reusable) < 10-min Reasoning (Reproducible) Customized I/O Ring Conventional Workflow: Handcrafting Proposed Workflow: Agent-driven Legacy Design Knowledge ~1-min Learning I/O Planning Experts Design Inputs for I/O Pad Ring AMS-IC Design Flow   ☺ ☺ Figure 1: Comparison of conventional and agent-driven I/O ring design in a real AMS IC design workflow. As a result, AMS I/O design is labor-intensive, with most effort rarely reusable. In wirebond-packaged chips (Fig. 1), a novice engineer may spend one or two days on studying, manually assembling, and verifying I/O placement and con- nections. Iterative pin changes often lead to disruptive re- work risks, which intensify as tape-out approaches. These challenges highlight the need for intelligent automation, for which recent advances in large language models (LLMs) of- fer a promising foundation. While LLMs have shown promising capabilities across several hardware design tasks (Chen et al. 2024; Fang et al. 2025), their application to AMS I/O design remains under- explored due to three key challenges: (1) the lack of accessi- ble domain knowledge, which is typically confined to team- specific practices and scattered internal documents, (2) the absence of standardized task interfaces, as interaction still relies on GUI or domain-specific languages unfamiliar to pretrained LLMs, and (3) the unavailability of public bench- marks, which hinders systematic evaluation. To bridge this gap, we propose AMS-IO-Agent, a domain- specialized LLM-based agent for structure-aware AMS I/O generation. It integrates two core capabilities: (1) a domain arXiv:2512.21613v1 [cs.AI] 25 Dec 2025 EDA script (Skill) Baseline Method: Direct Code Generation Proposed Method: Design Intent Structuring Intent graph Sparse pre-trained data  Poor performance ☺Rich pre-trained data ☺Robust performance EDA script (Skill) Figure 2: Comparison of baseline direct code generation and the proposed structured design intent. knowledge base built from fragmented engineering prac- tices, capturing reusable constraints and layout conventions, curated from real training materials developed by a profes- sional AMS IC design team of more than

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