AssertMiner: Module-Level Spec Generation and Assertion Mining using Static Analysis Guided LLMs

📝 Original Info

• Title: AssertMiner: Module-Level Spec Generation and Assertion Mining using Static Analysis Guided LLMs
• ArXiv ID: 2511.10007
• Date: 2025-11-13
• Authors: ** 논문에 명시된 저자 정보가 제공되지 않았습니다. **

📝 Abstract

Assertion-based verification (ABV) is a key approach to checking whether a logic design complies with its architectural specifications. Existing assertion generation methods based on design specifications typically produce only top-level assertions, overlooking verification needs on the implementation details in the modules at the micro-architectural level, where design errors occur more frequently. To address this limitation, we present AssertMiner, a module-level assertion generation framework that leverages static information generated from abstract syntax tree (AST) to assist LLMs in mining assertions. Specifically, it performs AST-based structural extraction to derive the module call graph, I/O table, and dataflow graph, guiding the LLM to generate module-level specifications and mine module-level assertions. Our evaluation demonstrates that AssertMiner outperforms existing methods such as AssertLLM and Spec2Assertion in generating high-quality assertions for modules. When integrated with these methods, AssertMiner can enhance the structural coverage and significantly improve the error detection capability, enabling a more comprehensive and efficient verification process.

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