FPGA-Accelerated RISC-V ISA Extensions for Efficient Neural Network Inference on Edge Devices
📝 Original Info
- Title: FPGA-Accelerated RISC-V ISA Extensions for Efficient Neural Network Inference on Edge Devices
- ArXiv ID: 2511.06955
- Date: 2025-11-10
- Authors: ** 논문에 명시된 저자 정보가 제공되지 않았습니다. (예시: 홍길동, 김철수, 박영희 등) **
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