In our work we propose implementing fuzzy logic using memristors. Min and max operations are done by antipodally configured memristor circuits that may be assembled into computational circuits. We discuss computational power of such circuits with respect to m-efficiency and experimentally observed behavior of memristive devices. Circuits implemented with real devices are likely to manifest learning behavior. The circuits presented in the work may be applicable for instance in fuzzy classifiers.
Transistor circuits with underlying Boolean algebra operations form the basis of today's computers.
Manufacturing processes for implementing them have been steadily improving in the past decades [1].
Yet the current microprocessor designs are many orders of magnitude less energy efficient than human brain [2]. The discovery of memristor [3], the fourth fundamental circuit element [4], holds a promise to narrow this gap [5]. First of all, it can be used for high-density non-volatile memory [6]. Secondly, boolean logic applications have been demonstrated in [7] and [8]. Specialized memristor circuits have been proposed to solve contour detection [9] and to find the way through a maze [10].
Here we show (Theorem 1) that memristors quite naturally compute operations of fuzzy logic [11],
which is an extension of classical Boolean logic. Thus memristors are capable also of processing, and memristor circuits can bridge boundaries between memory and processing units that are present in classical (von Neumann) computers. There are other approaches that promise a dramatic leap in computer performance, such as quantum computing [12], [13]. However, at present memristors hold the advantage in manufacturing, being well within reach of today’s nanotechnology [14].
where memristance M is variable. The defining property of memristor is that there exists a functional relationship g(q, φ) = 0 between the magnetic flux φ and charge q, where
In a charge-controlled memristor this relation takes the form φ = φ(q) and by taking the time derivative one obtains
and thus for the charge-controlled memristor one has can be computed by using Kirchhoff’s voltage law V = R I, where
One can thus determine the currents by solving the system of linear equations, e.g. by Cramer’s rule to obtain
where
This implies that the output voltage V satisfies
The
All memristors considered in this section are assumed to be charge driven, where memristance M(q) is a monotonically increasing function satisfying
where 0 < R ON < R OF F We shall call such devices ideal bilevel memristors.
where a and b take values in the interval [0, 1]. The min-max logic has been shown to be the only choice under natural assumptions [15]. Now we will show that antipodally configured memristors can compute the first two operations.
Proof: Consider the left circuit in Figure 3. Suppose X > (1 + R OF F /R)Y . Then from (1) we see that I 1 < 0 and I 2 < 0. In fact, the currents are bounded away from 0 by a constant δ > 0 independently of time. From the definition of ideal bilevel memristor we conclude that memristance of the left memristor approaches R ON and the memristance of the right memristor approaches R OF F . Then from (2) we obtain
The symmetric case when Y > (1 + R OF F /R)X is handled in the same way. In the remaining case we
where M 1 (t), M 2 (t) denote the memristances of the left and right memristor in time t.
The proof of computation of min proceeds in a similar way.
Antipodally configured memristors proved useful in other ways as well: in context of memory circuits [16], [17], contour detection [9], STDP modeling [18] as well as logic [8].
In order to implement a fuzzy negation or a fuzzy implication we propose to fall back to CMOS logic.
This can be done as needed, or by precomputing negations of variables at the beginning of a computational circuit [19]. Figure 4 shows how for a given set of inputs and their negations one can compute implication function and its negation. A CMOL framework for interface between nanoscale memristor crossbars and traditional CMOS components have been suggested in [20].
However, even without these operations, min-max circuits can carry out interesting computations. For One caveat is that the circuits listed in Figure 3 compute min and max only approximately. The approximation errors are controlled by the ratio µ eff = R OF F /R ON , that we shall call m-efficiency.
Experimental devices have been constructed with m-efficiency between 10 and 10 6 [20]. If the m-efficiency is not large enough, the output of circuits in Figure 3 is 3 shows the effect of varying m-efficiency on the output from a bitonic sorting network. The picture demonstrates a strong linearization effect of a bitonic network for low values of m-efficiency whose impact fades with increasing m-efficiency.
Only partial results are known for the behavior of recursive fuzzy logic circuits. Chaotic behavior of self-referential fuzzy systems is shown in [24]. A well known liar’s paradox is proved to have a solution under quite general conditions in [25].
Let us compare the behavior of an ideal bilevel memristor with the behavior of experimentally studied devices, especially T iO 2 memristors. Bilevel resistance is indeed typical for metal oxide devices. (Notable is work of W. Lu [26], who showed that amorphous silicon memristor is capable of maintaining many states between R ON and R OF F ). Monoticity assumptions are mildly violated by T iO 2 me
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