We present a two-layer fully connected neuromorphic system based on a thin-film transistor (TFT)-type NOR flash memory array with multiple postsynaptic (POST) neurons. Unsupervised online learning by spike-timing-dependent plasticity (STDP) on the binary MNIST handwritten datasets is implemented, and its recognition result is determined by measuring firing rate of POST neurons. Using a proposed learning scheme, we investigate the impact of the number of POST neurons in terms of recognition rate. In this neuromorphic system, lateral inhibition function and homeostatic property are exploited for competitive learning of multiple POST neurons. The simulation results demonstrate unsupervised online learning of the full black-and-white MNIST handwritten digits by STDP, which indicates the performance of pattern recognition and classification without preprocessing of input patterns.
In the era of exponential data growth, bio-inspired neuromorphic computing system has been suggested as one of the most promising computing architectures for achieving low-power operation. 1- 6 With the help of software, neuromorphic systems based on deep neural networks (DNNs) using the back-propagation algorithm have been highlighted for its excellent computational capability. [7][8][9] The computing system using offline supervised method is suitable for dealing with labeled data, which requires extrinsic error calculation for adjusting parameters before the process. 10 On the other hand, in spiking neural networks (SNNs), complex cognitive tasks involving unsupervised online learning and recognition of unstructured data can be effectively performed using STDP learning algorithm associated with connections between neurons. [11][12][13][14][15] Currently, the inference performance of neuromorphic systems based on SNNs has been investigated in simulations. [16][17][18][19] However, these works require additional circuitry for fine-tuning of device parameters given the variability of memristors, which has remarkable impact on the recognition performance for processing various types of data. Previously, we presented a smallscale pattern classification task by introducing a TFT-type NOR flash memory cell as a synaptic device. 20 In this study, a two-layer fully connected neuromorphic system with multi-neuron of an output layer is proposed using the characteristics of the TFT-type NOR flash synaptic devices. In order to show competitive performance of unsupervised online learning by STDP learning algorithm, an update pulse scheme is modified to induce multi-level synaptic weight states and improve linearity of conductance response. Furthermore, homeostatic property of multiple POST neurons has been exploited to classify the full binary MNIST dataset in an unsupervised manner. 16
Fig. 1(a) and (b) show schematic 3D array view and cross-sectional single cell view of a TFT-type NOR flash memory synaptic device, respectively. The crossbar synaptic array in which word line (WL) and bit line (BL) represent the control gate and the drain, respectively, is advantageous for scaling of synaptic devices. As shown in Fig. 1(b), a half-covered n + poly-Si floating gate (FG) between a cross-point of the WL and the source line serves as a charge storage layer. The amount and polarity of the charge stored can be controlled by adjusting bias conditions of the WL and the source line. Fig. 1(c) shows the fabricated TFTtype NOR flash memory synaptic device in our previous work. 20 The synapse-like nature of the crossbar NOR flash memory arrays is due to the fact that input pulses applied to each PRE neuron reflect the memory state of each cell as a current and are summed up at the BL.
Fig. 2 introduces the whole neuromorphic system using a TFT-type NOR flash memory synaptic array. In order to implement computational tasks by STDP learning rule, the system is largely divided into three components: synaptic arrays, integrate-and-fire POST neuron circuits, and spike generators. As PRE input pulses are applied into WLs, the current through each synapse is fed into the POST neurons via a current mirror circuit. When the membrane potential exceeds a threshold of the POST neuron, a pulse from the spike generator based on the neuronal firing is transmitted to other neurons. The connectivity of POST neurons leads to competitive learning with lateral inhibition in the network.
Homeostatic property is also implemented for balancing neural activity of POST neurons in the output layer. Concurrently, by presenting a feedback pulse of the POST neuron to the source line of the synaptic array, a synaptic weight update based on STDP learning algorithm can be implemented in dependence on the timing difference between input and output spikes. Fig. 3 (a) represents a pulse scheme of PRE and POST neurons for selective updating in As a POST neuron is fired, the weights of synapses contributing to the spike are potentiated in erase condition (Xpre = -3 V, Xpost = Vpost, +) by applying a POST feedback pulse to the common source line, which corresponds to the so-called long-term potentiation (LTP). The weights of the others are depressed in program condition (Xpre = 0 V, Xpost = Vpost, -) by the POST feedback pulse, which corresponds to the so-called long-term depression (LTD) in the STDP learning rule. Accordingly, the simplified STDP characteristic is illustrated as shown in Fig. 3(b). The weight change of LTP and LTD are varied with the conductance states of synapses. Fig. 4(a) shows measured LTP/LTD characteristics of a synaptic device. Specifically, as shown in Fig. 4(b), the LTD characteristic was investigated in three cases to avoid an abrupt LTD characteristic, which degrades accuracy in our previous work. 20 By modulating the amplitude of negative voltage of feedback POST pulse in case 3 of Fig. 4(b), not only multilevel conductance states were
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