Timed automata and register automata are well-known models of computation over timed and data words respectively. The former has clocks that allow to test the lapse of time between two events, whilst the latter includes registers that can store data values for later comparison. Although these two models behave in appearance differently, several decision problems have the same (un)decidability and complexity results for both models. As a prominent example, emptiness is decidable for alternating automata with one clock or register, both with non-primitive recursive complexity. This is not by chance. This work confirms that there is indeed a tight relationship between the two models. We show that a run of a timed automaton can be simulated by a register automaton, and conversely that a run of a register automaton can be simulated by a timed automaton. Our results allow to transfer complexity and decidability results back and forth between these two kinds of models. We justify the usefulness of these reductions by obtaining new results on register automata.
Timed automata [2] and register automata (known originally as finite-memory automata) [8] are two widely studied models of computation. Both models extend finite automata with a kind of storage: clocks in the case of timed automata, capable of measuring the amount of time elapsed from the moment they were reset; and registers in the case of register automata, capable of storing a data value for future comparison. In this paper we are interested in decidability and complexity of standard decision problems for both models of automata. In particular, we focus on the problems of nonemptiness (Does an automaton A accept some word?), universality (Does an automaton A accept all words?), and inclusion (Are all words accepted by an automaton A also accepted by an automaton B?).
The emptiness problem for nondeterministic timed or register automata is PSPACE-complete [2,4]. It becomes undecidable for alternating automata of both kinds [9,15,4], as soon as they have at least two clocks or registers [2,4]. Even the universality problem was shown undecidable for nondeterministic timed and register automata, respectively, with two clocks or registers [2,13,4]. A break-through result of [14] showed that universality becomes decidable for one clock timed automata. Later, the emptiness problem for one clock alternating timed automata was shown decidable. However, the computational complexity of this problem has been found to be non-primitive recursive [9,15]. Analogous (independent) results appeared for the other model: emptiness is decidable and non-primitive recursive for one register alternating automata [4]. For infinite words, both one clock and one register alternating automata are undecidable, as well as the universality problem of nondeterministic one clock/register automata [9,1,4]. The analogies between the two models appear to some extent also at the level of proof methods. The decidability proofs for one clock/register alternating automata are based on similar well-structured transition systems; and both non-primitive recursive lower bounds are obtained by simulation of a kind of lossy model of computation. All these analogies between the two models rise a natural question about the relationship between them. This paper is an attempt to answer this question.
Register automata were traditionally investigated over an unordered data domain. However, our model works on a data domain equipped with a total order. This is a necessary extension, that allows to simulate runs of timed automata, and to have a tight equivalence between the timed and the register models. Roughly speaking, the main contribution of this paper is to show that timed automata and register automata over an ordered data domain are equivalent models, as far as one concerns complexity and decidability of decision problems.
On a more technical level, we show that a run of a timed/register automaton on a timed/data word w may be simulated by a run of a register/timed automaton over a specially instrumented transformation of w, that we call braid. The reductions we exhibit are performed in exponential time, and keep the number of clocks equal to the number of registers, and preserve the mode of computation (alternating, nondeterministic, deterministic). Additionally, we show that the complement of all braids is recognizable by a nondeterministic one clock/register automaton. These results lead straightforwardly to reductions from decision problems for one class of automata to analogous problems for the other class, thus allowing us to carry over (un)decidability results and derive complexity bounds in both directions.
As an application, our simulations allow to obtain known results on timed (or register) models as simple consequences of results on register (or timed) models. These include, e.g., that over finite words the emptiness problem of alternating 1 register automata is decidable [4]. In fact, our reductions yield decidability of the model extended with a total order over the data domain. As two further examples of application, we show how the following decidability results for timed automata can be transferred to the class of register automata:
• decidability of the inclusion problem between a nondeterministic (many clocks) automaton and an alternating one clock automaton (shown in [9]);
• decidability of the emptiness problem for an alternating (many clocks) automaton over a bounded time domain (shown in [7]). In this paper we limit our study to finite timed and data words, as the first step in the general program of relating the timed and data settings.
R + denotes the set of non-negative real numbers. Let B + (X) denote the set of all positive boolean formulas over the set X of propositions, i.e., the set generated by:
We fix a finite alphabet A for the sequel. We recall the definitions of alternating timed and register automata [9,4]. To avoid inessential technical complications, we have deliberately chosen a slightly unusual definit
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