SystemC Analysis of a New Dynamic Power Management Architecture

SystemC Analysis of a new Dynamic Power Management Architecture Massimo Conti Università Politecnica delle Marche, via Brecce Bianche, I-60131, Ancona, Italy Abstract This paper presents a new dynamic power management architecture of a System on Chip. The Power State Machine describing the status of the core follows the recommendations of the ACPI standard. The algorithm controls the power states of each block on the basis of battery status, chip temperature and a user defined task priority. 1. Dynamic Power Management Architecture Dynamic Power Management (DPM) is a design methodology that dynamically switches the operating mode of a system increasing or decreasing the performances of the system itself in order to reduce power consumption. Many DPM algorithms have been introduced to force in sleep or standby states the device when it is idle. Recently Intel, Microsoft and Toshiba proposed the Advanced Configuration and Power Interface (ACPI) to provide a standard for the HW/SW interface. The dynamic power management architecture of a System on Chip (SoC) presented in this paper is reported in Fig.1. The SoC consists of different Intellectual Properties (IP). Each IP is considered as a black box and no detailed knowledge of its internal structure is assumed. A Power State Machine (PSM) and a Local Energy Manager (LEM) are hardware components associated to each IP, or some of them. The Power State Machine (PSM) describes the status of the core following the indications of the ACPI standard: executing at high or low performance, sleeping or in software-off state. The LEM dynamically switches the power state of the IP on the basis of the operations the IP is performing, and under the control of a Global Energy Manager (GEM), if it is present in the SoC. Service Request GEM LEM PSM IP BUS … Task Request Service Request LEM PSM IP Task Request Battery Status Temperature Sensor Fig. 1 - SoC dynamic power management architecture. The GEM conditionally enables the LEM on the basis of the requests of all the IP blocks, of the status of the SoC resources (battery energy, chip temperature, bus occupation, etc.), and on the priority of each IP. The DPM architecture proposed combines variable-voltage technique and the strategy that sets to sleep mode the device when it is inactive. 1.1. Functional IP We suppose that the instructions, that the functional IP executes, are grouped in “tasks”, that is sequences of instructions. The IP executes the “tasks” on the basis of some external service requests coming from the other IP blocks or from outside the SoC. The functional IP sends a task execution request to the LEM before the execution of each task. The LEM defines the power state of the PSM on the basis of GEM acknowledge, and the PSM enables the functional IP for the execution of the instruction according to the power state. 1.2. Power State Machine (PSM) The PSM follows the recommendations of the ACPI standard: soft off, four sleep states (SL1, SL2, SL3, SL4), four execution states (ON1, ON2, ON3, ON4) with decreasing speed and power consumption using the variable-voltage technique. The voltage-scaling technique optimizes power consumption decreasing clock frequency and supply voltage in an appropriate way. During the power characterization of the IP an average energy dissipation is associated to each power state and type of instructions the IP is executing. The DPM algorithm used considers the cost in terms of delay and power dissipation of the transition between two power states. The LEM sets the power state to the PSM that communicates the actual state to the functional block. The LEM estimates the consumption of the actual task on the basis of the signals coming from the PSM. 1.3. Local Energy Manager (LEM) The Local Energy Manager (LEM) establishes the type of ON state when the IP must execute a task, and establishes if the IP must go in sleep or off state when it is inactive for a certain amount of time. The LEM receives in input the task priority (coded in 4 classes: Low, Medium, High and Very high), the battery status (coded in 5 classes: Empty, Low, Medium, High and Full), the chip temperature (coded in 3 classes: Low, Medium and High), Proceedings of the Design, Automation and Test in Europe Conference and Exhibition (DATE’05) 1530-1591/05 $ 20.00 IEEE the energy dissipated by the other IP blocks in the SoC, and the enable signal from the GEM. When the IP sends a task execution request, the LEM forwards the request to the GEM, if present, it estimates the battery status and temperature value at the end of the task execution and it establishes the power state following the rules reported in Table 1. These relationships can be seen as expressions of the natural language, as in the fuzzy rules: If the priority is high and the battery is empty then the power state is ON4 … These rules are

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