Interlayer-mediated catalyst engineering for ultra-high aspect ratio silicon nanostructures

Reliable and precise etching of silicon nanostructures with ultra-high aspect ratios is required in many fields. Metal assisted chemical etching (MacEtch) in vapor is a plasma-free etching method that attracts considerable attention owing to the ability to create smooth, high aspect ratio nanostructures. MacEtch understanding and applications are limited by low fidelity and inconsistent pattern transfer from the catalyst layer to the silicon substrate. The locally constrained electrochemical interactions at the catalyst site make MacEtch particularly sensitive to catalyst contamination reducing the reaction rate and pinning the catalyst during etching. Removing contaminants is essential to improve pattern transfer for reliable processes on a larger area and higher aspect ratio. Physically separating the main source of carbon - the resist - from the catalyst with a sacrificial and functional interlayer solves this issue. The interlayer separates the resist and the catalyst and allows for thorough cleaning of the substrate before catalyst deposition. The resulting clean catalyst has improved stability, quality and reproducibility, enabling reliable fabrication of dense (50% patterned area) high aspect ratio (>250:1) nanostructures. Two different interlayer materials (Cr and Al${2}$O${3}$) and two patterning approaches are presented, showcasing etching of various high aspect ratio nanostructures, such as X-ray Optics.

💡 Research Summary

The paper addresses a critical limitation of gas‑phase metal‑assisted chemical etching (MacEtch) for silicon: poor pattern fidelity caused by contamination of the catalyst layer with residues from the lithographic resist. Such contamination hampers charge carrier injection at the catalyst‑silicon interface, leads to catalyst pinning, and results in non‑uniform etch rates and uncontrolled catalyst motion, especially problematic in the gas phase where reactant concentrations are low. To solve this, the authors introduce an inert interlayer between the resist and the catalyst, physically separating the two and allowing thorough cleaning of the silicon surface before catalyst deposition. Two interlayer materials are explored: chromium (Cr) and aluminum oxide (Al₂O₃).

Two patterning strategies are presented. The first, “interlayer‑etch” (I‑Et), deposits a Cr interlayer, patterns the resist by electron‑beam lithography, and transfers the pattern into Cr via plasma etching. After complete resist removal and oxygen‑plasma cleaning, a Pt catalyst is deposited. SEM and EDX confirm that both Cr and Pt remain intact after etching, and the catalyst‑silicon interface is clean, enabling straight, uniform etching. A 200 nm wide, 4.8 µm tall H‑bar pillar was fabricated in 15 min at 55 °C with 25 % HF, achieving an aspect ratio exceeding 250:1.

The second strategy, “interlayer‑lift‑off” (I‑Lo), uses Al₂O₃ as the interlayer. After depositing Al₂O₃ over the resist, the resist is dissolved, leaving a patterned Al₂O₃ mask without any plasma step. This approach is compatible with multilayer stacks and CMOS‑compatible processes. Al₂O₃ survives the HF vapor environment of gas‑phase MacEtch, acting as an effective etch blocker. Using this method, 400 nm wide lines were etched to a depth of 15 µm in 30 min at 60 °C with 50 % HF, again surpassing a 250:1 aspect ratio.

Both methods dramatically reduce catalyst pinning and improve etch uniformity, enabling dense pattern coverage (≈50 % of the surface) while maintaining ultra‑high aspect ratios. The work demonstrates that the interlayer concept not only removes resist‑derived carbon contamination but also provides a versatile platform for engineering the catalyst‑silicon interface. Cr serves as a metallic blocker stable under oxygen plasma, whereas Al₂O₃ offers an insulating, CMOS‑compatible alternative that can be combined with additional functional layers. The authors validate the approach with cross‑sectional SEM, EDX, and etch depth measurements, and showcase its applicability to X‑ray optics components that require precise, high‑aspect‑ratio silicon nanostructures.

Overall, the study presents a robust, scalable solution to the reproducibility challenges of MacEtch, opening pathways for large‑area manufacturing of high‑performance silicon nanostructures in photonics, sensing, and energy applications. Future work may focus on optimizing interlayer thickness, extending the method to other catalyst metals, and integrating the process into full‑wafer production lines.