Surface code off-the-hook: diagonal syndrome-extraction scheduling

In the rotated surface code, hook errors (errors on auxiliary qubits midway through syndrome extraction that propagate to correlated two-qubit data errors) can reduce the circuit-level code distance by a factor of two if the extraction schedule is poorly chosen. The traditional approach uses N-shaped and Z-shaped schedules, selecting the orientation in each plaquette to avoid hook errors aligned with logical operators. However, this becomes increasingly complex within lattice surgery primitives with varied boundary geometries, and requires a 7-step schedule to avoid gate collisions. We propose the diagonal schedule, which orients hook errors along the diagonal of each plaquette. These diagonal errors crucially never align with logical operators regardless of boundary orientation, achieving full code distance. The diagonal schedule is globally uniform: all X-type plaquettes use one schedule and all Z-type plaquettes use another, eliminating geometry-dependent planning. On hardware supporting parallel measurement, reset, and gate operations, the schedule achieves a minimal period of 6 time steps, compared to 7 for the traditional approach. We demonstrate effectiveness for memory experiments, spatial junctions, spatial Hadamard gates, and patch rotation, showing equivalent or improved logical error rates while simplifying circuit construction.

💡 Research Summary

The paper addresses a critical limitation of the rotated surface code: hook errors that arise when an auxiliary qubit suffers a fault midway through a stabilizer measurement and propagates to a correlated two‑qubit data error. If the gate ordering (syndrome‑extraction schedule) aligns these hook errors with the logical operator directions (horizontal for X‑type logicals, vertical for Z‑type logicals), the effective code distance can be reduced by a factor of two, dramatically degrading performance.

The conventional mitigation uses two distinct gate orderings—commonly called N‑shaped (producing vertical hook errors) and Z‑shaped (producing horizontal hook errors). By selecting the appropriate orientation for each plaquette based on nearby boundary geometry, one can keep hook errors perpendicular to logical operators. However, this approach becomes cumbersome in lattice‑surgery primitives where patches are merged, split, or rotated, because the optimal orientation varies across space‑time. Moreover, adjacent plaquettes with different orientations require a 7‑step cycle to avoid gate collisions, and in many realistic hardware platforms the measurement and reset operations must be performed in separate time steps, further increasing latency.

The authors propose a “diagonal schedule” that eliminates geometry‑dependent planning altogether. In this schedule, the four two‑qubit gates that couple an auxiliary qubit to its four data neighbors are ordered so that the first two act on one diagonal pair of data qubits and the last two act on the opposite diagonal pair. Consequently, any hook error propagates along a diagonal of the plaquette. Since logical operators in the surface code always run along purely horizontal or vertical paths between same‑type boundaries, a diagonal hook can never form a shortcut for a logical error, regardless of the surrounding boundary orientation. Thus the diagonal schedule preserves the full code distance for any lattice geometry.

Key technical contributions include:

1. Uniformity – All X‑type plaquettes share a single diagonal schedule, and all Z‑type plaquettes share another. No per‑plaquette orientation decisions are needed, simplifying circuit generation and verification.
2. Constraint Satisfaction – The schedule respects the parity constraint that, when X‑ and Z‑type stabilizers share data qubits, an even number of those shared qubits must be coupled to one auxiliary before any are coupled to the other. The diagonal ordering fulfills this condition naturally.
3. Reduced Cycle Time – On hardware that can perform measurement and reset in parallel with entangling gates, the diagonal schedule achieves a 6‑step period (reset → four gates → measurement) compared with the 7‑step minimum of the traditional N/Z approach. When measurement/reset must be sequential, the diagonal schedule can still be run in 8 steps (or 9 steps if a small padding is kept for compatibility with spatial Hadamard constructions), which is comparable to or better than the N/Z requirement of 7–9 steps.
4. Error‑Propagation Analysis – A diagonal hook triggers four neighboring stabilizer measurements (instead of two for horizontal/vertical hooks), producing a non‑matching error pattern. The authors show that standard matching decoders (PyMatching, Tesseract) can handle this by decomposing the two‑qubit error into two independent single‑qubit errors, preserving the decoder’s effective distance.
5. Comprehensive Simulations – Using a uniform depolarizing noise model (gate, reset, and measurement errors all at rate p), the authors benchmark the diagonal schedule across several scenarios:
   • Memory experiment on a single patch: logical error rates match those of the N/Z schedule while using the same 6‑step period.
   • Spatial junctions (L‑shaped and X‑shaped connections): diagonal scheduling avoids the intricate orientation analysis required by N/Z and yields equal or slightly lower logical error rates, thanks to the shorter cycle.
   • Spatial Hadamard: the operation introduces stretched stabilizers that are vulnerable to hook errors. By adding flag qubits (aux_l, d_shared) measured in parallel, the authors detect intermediate hook faults without increasing circuit depth. The diagonal schedule again runs at the minimal 6‑step period.
   • Patch rotation: the uniform schedule simplifies the rotation circuit and maintains full distance.

All circuits were generated with the TQEC library, simulated with Stim, and decoded with either PyMatching or the Tesseract decoder. The code and scripts are publicly released (GitHub link provided), ensuring reproducibility.

In summary, the diagonal syndrome‑extraction schedule offers a principled solution to the hook‑error problem: it guarantees full code distance irrespective of boundary geometry, removes the need for per‑plaquette schedule selection, and achieves the shortest possible cycle time on hardware that supports parallel measurement/reset. These advantages make it especially attractive for near‑term experiments that rely heavily on lattice surgery—where complex boundary configurations are the norm—and for future large‑scale surface‑code processors where uniformity and low latency are essential for scaling. The work therefore represents a significant step toward more robust and hardware‑friendly fault‑tolerant quantum computing.