RFSoC-Based Integrated Navigation and Sensing Using NavIC

Prior art has proposed a secondary application for Global Navigation Satellite System (GNSS) infrastructure for remote sensing of ground-based and maritime targets. Here, a passive radar receiver is deployed to detect uncooperative targets on Earth’s surface by capturing ground-reflected satellite signals. This work demonstrates a hardware prototype of an L-band Navigation with Indian Constellation (NavIC) satellite-based remote sensing receiver system mounted on an AMD Zynq radio frequency system-on-chip (RFSoC) platform. Two synchronized receiver channels are introduced for capturing the direct signal (DS) from the satellite and ground-reflected signal (GRS) returns from targets. These signals are processed on the ARM processor and field programmable gate array (FPGA) of the RFSoC to generate delay-Doppler maps of the ground-based targets. The performance is first validated in a loop-back configuration of the RFSoC. Next, the DS and GRS signals are emulated by the output from two ports of the Keysight Arbitrary Waveform Generator (AWG) and interfaced with the RFSoC where the signals are subsequently processed to obtain the delay-Doppler maps. The performance is validated for different signal-to-noise ratios (SNR).

💡 Research Summary

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The paper presents a hardware prototype for passive GNSS‑reflectometry using India’s Navigation with Indian Constellation (NavIC) L‑band signals, implemented on an AMD Zynq RFSoC 4×2 platform. The system captures both the direct satellite signal (DS) and the ground‑reflected signal (GRS) with two synchronized receiver channels. The RFSoC integrates a quad‑core ARM A53 processor, an UltraScale FPGA, and on‑chip RF data converters (RFDCs), enabling a compact hardware‑software co‑design where time‑critical signal processing can be partitioned between the programmable logic (PL) and the processing system (PS).

The NavIC L5 signal (centered at 1.176 GHz) uses a 1.023 MHz PRN code with a 1 ms pulse repetition interval. The prototype up‑samples the PRN sequence to 61.44 MHz using three cascaded FIR interpolators, adds modeled channel effects (path loss, delay, Doppler, AWGN), and feeds the samples to the RFDC DAC. The DAC interpolates by a factor of 40, up‑converts to 2.45 GHz, and then mixes to the NavIC carrier using a numerically controlled oscillator. In the loop‑back configuration, the analog output is wired directly back to the ADC inputs, allowing a fully digital verification of the transmit‑receive chain.

Two validation experiments are performed. First, a pure RFSoC loop‑back is used, where the transmitted samples are digitized again after passing through the DAC‑ADC path, with controlled SNR ranging from –5 dB to –12 dB. Second, a Keysight M8910A arbitrary waveform generator (AWG) emulates the RF‑band DS and GRS signals; the AWG outputs the two channels synchronously at 2.45 GHz, and the RFSoC receives them via its ADCs. In both setups, the PS executes coarse acquisition (C/A) processing on 1 ms data blocks: each channel is cross‑correlated with locally generated PRN references across 41 Doppler bins (–10 kHz to +10 kHz, 500 Hz spacing). The DS channel is first used to identify the transmitting satellite by detecting the PRN code with the highest correlation peak. The same PRN is then used for the GRS channel to generate a delay‑Doppler map (DDM).

Experimental results show clear satellite detection on the DS DDM, with a peak gain of about 20 dB over other PRNs. For target detection, both the loop‑back and AWG‑based configurations successfully resolve two targets spaced 4 km apart with a Doppler shift of 500 Hz, even at an SNR of –10 dB. At –5 dB SNR, the average root‑mean‑square error (RMSE) in bistatic range is 0.14 km and in Doppler is 250 Hz, which is within the theoretical resolution limits (NavIC’s 2 MHz bandwidth yields ~293 m range resolution; oversampling to 7.68 MHz improves range precision to ~40 m). The GRS channel exhibits a slightly lower post‑processing gain (≈3 dB less) due to the weaker reflected signal, but detection remains reliable down to –12 dB SNR.

The complete receiver chain processes a 1 ms data block in 274 ms while consuming only 3.75 W, demonstrating real‑time capability on a single‑chip platform. The authors note that moving the matched‑filter and FFT operations to the PL could provide up to a three‑fold speedup. Compared with prior work—such as a Nuand BladeRF‑based GNSS reflectometer and software‑defined interferometric receivers that rely on offline processing—the RFSoC solution offers substantially lower latency, reduced power, and the possibility of on‑board real‑time display via the PYNQ framework.

Limitations include the absence of a dedicated analog front‑end (AFE) for capturing real NavIC signals; the current prototype relies on simulated or AWG‑generated waveforms. Future work will integrate an AFE, extend the system to handle multiple NavIC satellites and multiple targets, and perform a detailed link‑budget analysis to quantify detection limits under realistic propagation losses.

In summary, the paper demonstrates that a modern RFSoC can serve as an effective, low‑cost platform for NavIC‑based passive radar, achieving real‑time delay‑Doppler mapping with modest power consumption. This opens pathways for deploying GNSS‑reflectometry in applications such as maritime surveillance, ground‑based target monitoring, and integrated communication‑navigation‑sensing systems, especially in regions where NavIC provides continuous satellite coverage.