Momentum-Driven Reversible Logic Accelerates Efficient Irreversible Universal Computation
We present implementations of two physically-embedded computation-universal logical operations using a 2-bit logical unit composed of coupled quantum flux parametrons – Josephson-junction superconducting circuits. To illustrate universality, we investigate NAND gates built from these two distinct elementary operations. On the one hand, Controlled Erasure (CE) is designed using fixed-point analysis and assumes that information must be stored in locally-metastable distributions. On the other, Erasure-Flip (EF) leverages momentum as a computational resource and significantly outperforms the metastable approach, simultaneously achieving higher fidelity and faster computational speed without incurring any additional energetic cost. Notably, the momentum degree of freedom allows the EF to achieve universality by using both nontrivial reversible and irreversible logic simultaneously in different logical subspaces. These results not only provide a practical, high-performance protocol ripe for experimental realization but also underscore the broader potential of momentum-based computing paradigms.
💡 Research Summary
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The paper presents a concrete implementation of two universal logical operations using a physically embedded two‑bit logical unit formed by coupling two quantum‑flux parametrons (QFPs) into a coupled QFP (CQFP) circuit. The authors focus on demonstrating computational universality by constructing NAND gates from these elementary operations. Two distinct protocols are examined: Controlled Erasure (CE) and a newly introduced Erasure‑Flip (EF).
The CQFP circuit consists of two identical QFPs, each realized as a dc‑SQUID with inductances L and l, capacitance C, and resistance R, coupled inductively via a tunable mutual inductance M₁₂. The system’s state is described by four phase variables (ϕ₁, ϕ₂, ϕ₁^{dc}, ϕ₂^{dc}), whose dynamics are modeled by under‑damped Langevin equations, allowing both positional (phase) and momentum (time derivative) degrees of freedom to be exploited. External magnetic fluxes (φ_i, φ_i^{dc}) and the coupling parameter m₁₂ are used as control knobs to reshape the potential energy landscape in real time.
When all control parameters are zero, the potential exhibits four symmetric wells corresponding to the binary states 00, 01, 10, and 11. Logical bits are encoded by the sign of the phase variables (ϕ_i<0 → 0, ϕ_i>0 → 1). By dynamically modulating the external fluxes, the authors guide ensembles of “particles” (representing many realizations of the system) through the landscape, thereby performing logical transformations.
The NAND gate, a universal two‑input Boolean operation, is implemented as a “partial NAND”: the CQFP naturally produces two output bits (x′, y′). The authors define the operation as (x′, y′) = (NAND(x, y), y), i.e., the first output carries the NAND result while the second output simply passes through the second input. This definition respects the physical constraint that the device always yields a two‑bit state.
Controlled Erasure (CE) – CE follows the approach of earlier work
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