COFFEE: A Carbon-Modeling and Optimization Framework for HZO-based FeFET eNVMs

Information and communication technologies account for a growing portion of global environmental impacts. While emerging technologies, such as emerging non-volatile memories (eNVM), offer a promising solution to energy efficient computing, their end-to-end footprint is not well understood. Understanding the environmental impact of hardware systems over their life cycle is the first step to realizing sustainable computing. This work conducts a detailed study of one example eNVM device: hafnium-zirconium-oxide (HZO)-based ferroelectric field-effect transistors (FeFETs). We present COFFEE, the first carbon modeling framework for HZO-based FeFET eNVMs across life cycle, from hardware manufacturing (embodied carbon) to use (operational carbon). COFFEE builds on data gathered from a real semiconductor fab and device fabrication recipes to estimate embodied carbon, and architecture level eNVM design space exploration tools to quantify use-phase performance and energy. Our evaluation shows that, at 2 MB capacity, the embodied carbon per unit area overhead of HZO-FeFETs can be up to 11% higher than the CMOS baseline, while the embodied carbon per MB remains consistently about 4.3x lower than SRAM across different memory capacity. A further case study applies COFFEE to an edge ML accelerator, showing that replacing the SRAM-based weight buffer with HZO-based FeFET eNVMs reduces embodied carbon by 42.3% and operational carbon by up to 70%.

💡 Research Summary

The paper addresses the growing carbon footprint of information and communication technologies (ICT) by focusing on emerging non‑volatile memory (eNVM) technologies, specifically hafnium‑zirconium‑oxide (HZO) based ferroelectric field‑effect transistors (FeFETs). While eNVMs promise higher density and lower operational energy compared with conventional SRAM, their life‑cycle carbon impact—encompassing both manufacturing (embodied carbon) and use‑phase (operational carbon)—has not been quantified. To fill this gap, the authors introduce COFFEE, the first carbon‑modeling framework that evaluates HZO‑FeFET eNVMs from wafer fabrication through inference workloads.

COFFEE integrates two distinct modeling components. The embodied‑carbon side builds on the industry‑standard A CT model, which uses iMec data to estimate baseline CMOS manufacturing emissions (energy per unit area EP_A, gas emissions GP_A, material emissions MP_A, and yield Y). The novel contribution lies in augmenting this baseline with a FeFET‑specific module that incorporates real‑fab recipe data for atomic‑layer‑deposition (ALD) of the HZO ferroelectric stack and an optional Al₂O₃ interfacial layer. The authors collected tool‑power measurements and process times for each ALD stage (pre‑heat, stabilization, HZO deposition, Al₂O₃ deposition) directly from a semiconductor fab. By multiplying stage‑specific power by duration, they compute the additional EP_A contributed by the ferroelectric layers. Similarly, they apply a measured greenhouse‑gas emission factor (µg CO₂ per nm·cm²) to obtain the extra GP_A. These layer‑level contributions are weighted by the area efficiency (AE) of the FeFET array, reflecting that only the memory region—not the entire chip—undergoes the extra steps. Material emissions and yield are assumed unchanged relative to the CMOS baseline because the added ALD steps use compatible precursors.

The operational‑carbon side leverages NVMExplorer, a cross‑stack simulation platform that combines device‑level databases with architectural exploration. Using NVSim‑derived power, latency, and area models for FeFET cells, NVMExplorer explores the design space under user‑defined constraints (e.g., target read/write latency, energy‑delay product, area). The resulting runtime energy per inference, together with the expected usage time T and the carbon intensity of electricity (CI), yields the operational carbon footprint (OCF = CI × energy × T). Importantly, the framework also incorporates endurance data from recent HZO‑FeFET publications to adjust the effective device lifetime (LT), ensuring that the proportion of operational carbon relative to embodied carbon reflects realistic wear‑out behavior.

Evaluation proceeds in three parts. First, a head‑to‑head comparison at a fixed 2 MB capacity shows that HZO‑FeFETs incur up to an 11 % higher embodied carbon per unit area than a pure CMOS baseline, due to the extra ALD steps. However, because FeFET cells are far more compact, the embodied carbon per megabyte is roughly 4.3 × lower than SRAM. Second, scaling the memory from 2 MB to 32 MB confirms that the per‑megabyte advantage remains stable, highlighting the benefit of high density for carbon reduction. Third, a case study replaces the SRAM‑based weight buffer of an edge machine‑learning accelerator with HZO‑FeFET eNVM. The substitution reduces the accelerator’s embodied carbon by 42.3 % and cuts operational carbon per inference by up to 70 %, driven by lower leakage, reduced write voltage, and the elimination of charge‑pump overhead.

The authors release COFFEE as an open‑source repository, enabling other researchers to plug in their own process data, device parameters, and workload profiles. They suggest future extensions to other eNVM technologies (RRAM, PCM), newer technology nodes, and co‑optimization of circuit techniques to mitigate FeFET endurance limitations.

In summary, COFFEE provides a rigorous, data‑driven methodology to quantify and optimize the full life‑cycle carbon impact of HZO‑based FeFET eNVMs. By demonstrating that high‑density, low‑leakage FeFETs can dramatically lower both embodied and operational carbon—especially in edge AI scenarios—the work makes a compelling case for incorporating sustainability metrics early in memory and system design.