Practical Evaluation of Quantum Kernel Methods for Radar Micro-Doppler Classification on Noisy Intermediate-Scale Quantum (NISQ) Hardware

Practical Evaluation of Quantum Kernel Methods for Radar Micro-Doppler Classification on Noisy Intermediate-Scale Quantum (NISQ) Hardware
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This paper examines the application of a Quantum Support Vector Machine (QSVM) for radarbased aerial target classification using micro-Doppler signatures. Classical features are extracted and reduced via Principal Component Analysis (PCA) to enable efficient quantum encoding. The reduced feature vectors are embedded into a quantum kernel-induced feature space using a fully entangled ZZFeatureMap and classified using a kernel based QSVM. Performance is first evaluated on a quantum simulator and subsequently validated on NISQ-era superconducting quantum hardware, specifically the IBM Torino (133-qubit) and IBM Fez (156-qubit) processors. Experimental results demonstrate that the QSVM achieves competitive classification performance relative to classical SVM baselines while operating on substantially reduced feature dimensionality. Hardware experiments reveal the impact of noise and decoherence and measurement shot count on quantum kernel estimation, and further show improved stability and fidelity on newer Heron r2 architecture. This study provides a systematic comparison between simulator-based and hardware-based QSVM implementations and highlights both the feasibility and current limitations of deploying quantum kernel methods for practical radar signal classification tasks.


💡 Research Summary

This paper investigates the feasibility of quantum kernel methods for classifying radar micro‑Doppler signatures of aerial targets. The authors start by generating a synthetic X‑band (9 GHz) radar dataset that contains three classes—helicopters, propeller‑driven aircraft, and jets—each with 150 samples. For every radar return, fifteen handcrafted features are extracted from short‑time Fourier transform (STFT) spectrograms, covering statistical moments, spectral bandwidth, entropy, centroid, roll‑off, and dominant frequency ratios.

Because encoding a 15‑dimensional vector directly onto a quantum processor would require an impractically deep circuit, the authors apply Principal Component Analysis (PCA) to the feature matrix. A sweep over 2–12 components shows that four principal components retain 81.58 % of the variance and yield the highest classification accuracy (94.81 %). Consequently, the quantum pipeline uses a four‑qubit circuit.

The quantum feature map is the fully‑entangled ZZFeatureMap with two repetitions (reps = 2). Each qubit receives a Hadamard gate, a data‑dependent Rz rotation, another Hadamard, and then pairwise ZZ interactions are applied to all qubit pairs, followed by measurement. The resulting circuit depth is 32 and the total gate count is 57, which is shallow enough for current NISQ devices.

A quantum kernel is defined as the squared inner product of the quantum states prepared by the feature map, K_q(x,x′)=|⟨ϕ(x)|ϕ(x′)⟩|². The kernel matrix is estimated by executing the circuit for each pair of training points and counting measurement outcomes (shots). The authors evaluate three shot budgets—1024, 2048, and 4096—to study statistical noise. Increasing the shot count reduces variance but yields diminishing returns once hardware‑induced errors dominate.

For the classical baseline, a Support Vector Machine with a radial‑basis‑function (RBF) kernel is trained on the full 15‑dimensional feature set (C = 10, γ set by the “scale” heuristic). Both the classical and quantum models use a 70/30 train‑test split with a fixed random seed (42) and stratified sampling.

Experiments are performed on three platforms: (i) a noiseless statevector simulator, (ii) IBM’s 133‑qubit “Torino” processor (first‑generation superconducting architecture), and (iii) IBM’s 156‑qubit “Fez” processor, which implements the newer Heron r2 architecture. On the simulator, the QSVM attains 94.81 % accuracy, slightly surpassing the classical RBF‑SVM (≈93 %). On Torino, the QSVM reaches 92.3 % accuracy; on Fez, it improves to 93.7 % thanks to lower two‑qubit gate error rates and better readout calibration. The authors attribute the performance gap between the two hardware platforms to differences in CNOT error rates, qubit connectivity (2‑D vs. 3‑D topology), and coherence times.

To mitigate hardware noise, the study applies measurement‑error mitigation, zero‑noise extrapolation (ZNE), and circuit recompilation that reduces the number of CNOT gates by about 10 %. Combined, these techniques raise the average accuracy by roughly 1 % on both devices. Nevertheless, the authors observe that increasing the number of qubits beyond four leads to a rapid drop in accuracy (≈2–3 % loss), indicating that current NISQ devices cannot support deeper, higher‑dimensional quantum kernels without substantial error correction.

The paper’s contributions are threefold: (1) a complete end‑to‑end quantum‑machine‑learning pipeline for a realistic radar classification task, (2) a systematic analysis of how shot count, gate depth, and hardware generation affect quantum kernel estimation, and (3) empirical evidence that quantum kernels can match classical kernels on a practical dataset while operating on a dramatically reduced feature space.

In the discussion, the authors stress that while the results are promising, practical deployment will require (i) further reductions in circuit depth, (ii) more sophisticated error‑mitigation or error‑correction schemes, and (iii) hardware with lower two‑qubit error rates. They suggest future work on multi‑layer quantum feature maps, hybrid quantum‑classical architectures (e.g., quantum kernels feeding into deep neural networks), and real‑time processing of streaming radar data.

Overall, the study demonstrates that quantum kernel methods are not merely theoretical curiosities but can be experimentally realized on contemporary superconducting quantum processors for a non‑trivial signal‑processing problem, highlighting both the potential advantages and the current limitations imposed by NISQ‑era hardware.


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