Demonstration of a quantum comparator on an ion-trap quantum device

Quantum computers are believed to solve a class of computational problems that are based on modular arithmetic faster than classical computers. Among the arithmetic building blocks, comparison of integer pairs is a primitive. Here we report its demonstration in the Reimei quantum computer at RIKEN, whose trapped-ion architecture provides all-to-all qubit connectivity together with high gate fidelities. We observe high success probabilities for bit widths n = 3, 5, 7, and 9: Under a conventional output-only success criterion we obtain 95% at n=9; under a stricter criterion additionally requiring the ancilla to be correct, the success is 69% at n=9. These results demonstrate reliable quantum comparison at scales far beyond those previously achieved experimentally, not only for comparators but also in the broader context of quantum arithmetic circuits.

💡 Research Summary

This paper reports the experimental realization of a quantum comparator on the Reimei trapped‑ion quantum computer at RIKEN. The comparator implements a reversible comparison of two non‑negative n‑bit integers a and b, mapping |a⟩|b⟩|c⟩ → |a⟩|b⟩|c⊕f(a,b)⟩ where f(a,b)=1 if a<b and 0 otherwise. The circuit follows the Cuccaro ripple‑carry design: a cascade of “comparator cells” each acting on a pair of bits (a_i, b_i) together with a single borrow ancilla qubit. Each cell uses Toffoli and CNOT gates to update the borrow according to the classical ripple‑borrow rule, and the final borrow is XORed into the output qubit. The construction requires 2n+2 qubits (two n‑qubit registers, one clean ancilla for borrow propagation, and one output qubit).

The Reimei device provides all‑to‑all connectivity and two‑qubit gate fidelities on the order of 99.9 %, which are especially advantageous for arithmetic circuits that involve many multi‑qubit interactions. In the experiment the authors first prepare a uniform superposition over all possible input pairs by applying Hadamard gates to every qubit in the a and b registers, thereby encoding 2ⁿ·2ⁿ input combinations in a single circuit execution. After the comparator is applied, all qubits are measured in the computational basis. No post‑selection or error‑mitigation techniques are employed.

Four values of n (3, 5, 7, 9) were tested, each with 100 shots. Two success criteria are considered. The conventional “output‑only” criterion counts a shot as successful if the measured result qubit matches the correct comparison outcome, regardless of the ancilla state. Under this metric the success probabilities are 98 % (n=3), 97 % (n=5), 97 % (n=7), and 95 % (n=9). The stricter “ancilla‑inclusive” criterion requires both the result qubit and the borrow ancilla to be correct. Here the success rates drop to 95 % (n=3), 92 % (n=5), 89 % (n=7), and 69 % (n=9). Error analysis categorises failures into four types: (i) ancilla‑inclusive success, (ii) wrong comparison result, (iii) correct result but flipped ancilla, and (iv) both wrong. Histograms show that at larger n the dominant failure mode is ancilla‑only errors, reflecting the fact that the borrow ancilla participates in every comparator cell throughout the circuit depth, accumulating X‑type errors, whereas the logical result is only extracted at the final stage and is therefore more robust.

The authors discuss the implications of these findings. For stand‑alone arithmetic the conventional metric may be sufficient, but when the comparator is embedded in larger algorithms ancilla errors can propagate and corrupt subsequent operations, making the stricter metric more relevant. The demonstrated success rates far exceed those of prior experimental work, which was limited to n = 2 and classical inputs, and illustrate that linear‑depth arithmetic circuits can be run reliably on current NISQ hardware given high‑fidelity gates and global connectivity.

Future improvements are suggested, including circuit depth reduction (e.g., parallel borrow propagation), the use of relative‑phase Toffoli gates to lower two‑qubit gate counts, and tailored error‑mitigation or fault‑tolerant techniques. The authors conclude that quantum comparators constitute a valuable benchmark for assessing the readiness of quantum processors for digital applications and will serve as building blocks for larger modular‑arithmetic circuits underlying many quantum algorithms. Data and native‑gate circuit descriptions are available from the corresponding author upon reasonable request.