Multiport Analytical Pixel Electromagnetic Simulator (MAPES) for AI-assisted RFIC and Microwave Circuit Design

This paper proposes a novel analytical framework, termed the Multiport Analytical Pixel Electromagnetic Simulator (MAPES). MAPES enables efficient and accurate prediction of the electromagnetic (EM) performance of arbitrary pixel-based microwave (MW) and RFIC structures. Inspired by the Integrated Internal Multiport Method (IMPM), MAPES extends the concept to the pixel presence/absence domain used in AI-assisted EM design. By introducing virtual pixels and diagonal virtual pixels and inserting virtual ports at critical positions, MAPES captures all horizontal, vertical, and diagonal electromagnetic couplings within a single multiport impedance matrix. Only a small set of full-wave simulations (typically about 1% of the datasets required by AI-assisted EM simulators) is needed to construct this matrix. Subsequently, any arbitrary pixel configuration can be evaluated analytically using a closed-form multiport relation without additional full-wave calculations. The proposed approach eliminates data-driven overfitting and ensures accurate results across all design variations. Comprehensive examples for single- and double-layer CMOS processes (180 nm and 65 nm) and PCBs confirm that MAPES achieves high prediction accuracy with 600- 2000x speed improvement compared to CST simulations. Owing to its efficiency, scalability and reliability, MAPES provides a practical and versatile tool for AI-assisted MW circuit and RFIC design across diverse fabrication technologies.

💡 Research Summary

This paper introduces the Multiport Analytical Pixel Electromagnetic Simulator (MAPES), a novel analytical framework designed to overcome the critical bottlenecks in AI-assisted RF integrated circuit (RFIC) and microwave circuit design. Traditional AI-driven design flows require massive datasets of full-wave electromagnetic (EM) simulations to train surrogate models for predicting the performance of pixel-based structures. This data generation process is computationally prohibitive, and the resulting models often suffer from overfitting and poor generalization due to the exponentially vast design space relative to the limited training samples.

MAPES fundamentally shifts the paradigm from data-intensive learning to physics-based analytical modeling. Inspired by the Integrated Internal Multiport Method (IMPM) used in pixel antenna design, MAPES adapts the concept for the “pixel presence/absence” domain central to AI-driven RFIC synthesis. The core methodology involves constructing an equivalent virtual model of the design space. The original contiguous pixel array is transformed into a grid of “virtual pixels” with gaps between them. At each pixel corner, a “diagonal virtual pixel” is inserted. Virtual ports are then placed between every adjacent pair of (diagonal) virtual pixels. A single, relatively small set of full-wave simulations (e.g., using CST or HFSS) is performed on this virtual model to extract a comprehensive multiport impedance matrix (Z_ALL). This matrix encapsulates all horizontal, vertical, and diagonal electromagnetic couplings inherent to the entire design technology and layout area.

When a user specifies an arbitrary metal pixel pattern (defined by a binary matrix P) and selects input/output port locations, MAPES employs an automated mapping algorithm. This algorithm converts the pixel presence/absence pattern into a specific configuration of load impedances (short or open circuits) connected across the virtual ports. The performance (S-parameters) at the user-defined I/O ports is then computed analytically and instantaneously using a closed-form solution derived from multiport network theory, combining the pre-computed Z_ALL matrix with the mapped load connections. No further full-wave simulation is required for any new design variation.

The paper validates MAPES through four comprehensive case studies spanning different technologies and complexities: a single-layer CMOS 180nm process, a double-layer CMOS 65nm process with inter-layer vias, a single-layer PCB, and a double-layer PCB with vias. In all cases, MAPES demonstrates excellent agreement with reference full-wave simulations (CST) across wide frequency ranges. Crucially, it achieves a speedup of 600 to 2000 times compared to direct CST simulations. The work highlights MAPES’s ability to natively model inter-layer vias—a challenge often omitted in prior AI-EM simulator research.

Key advantages of MAPES over existing approaches are emphasized. Compared to AI-based EM simulators, MAPES requires only about 1-2% of the data volume (the prior dataset for Z_ALL), eliminates data-driven overfitting, and guarantees accurate generalization across the entire design space. Compared to related Method of Moments (MoM)-based “efficient calculators,” MAPES offers greater practicality through easier integration with commercial simulators, a more compact matrix representation (scaling with the number of virtual ports rather than mesh elements), and inherent support for vias and arbitrary port placements.

In conclusion, MAPES provides a fast, accurate, scalable, and technology-versatile analytical engine for EM performance prediction. It serves not only as a powerful standalone simulator for exploring vast pixel-based design spaces but also as a potential physics-informed backbone for enhancing AI-driven design automation, paving the way for more efficient and reliable development of next-generation RF and microwave circuits.