An LLVM-Based Optimization Pipeline for SPDZ

Actively secure arithmetic MPC is now practical for real applications, but performance and usability are still limited by framework-specific compilation stacks, the need for programmers to explicitly express parallelism, and high communication overhead. We design and implement a proof-of-concept LLVM-based optimization pipeline for the SPDZ protocol that addresses these bottlenecks. Our front end accepts a subset of C with lightweight privacy annotations and lowers it to LLVM IR, allowing us to reuse mature analyses and transformations to automatically batch independent arithmetic operations. Our back end performs data-flow and control-flow analysis on the optimized IR to drive a non-blocking runtime scheduler that overlaps independent operations and aggressively overlaps communication with computation; when enabled, it can map batched operations to GPU kernels. This design preserves a low learning curve by using a mainstream language and hiding optimization and hardware-specific mechanics from programmers. We evaluate the system on controlled microbenchmarks against MP-SPDZ, focusing on online phase performance. Our CPU back end achieves up to 5.56 times speedup under intermediate and heavy algebraic workloads, shows strong scaling with thread count, and our GPU back end scales better as the input size increases. Overall, these results indicate that leveraging LLVM with protocol-aware scheduling is an effective architectural direction for extracting parallelism without sacrificing usability.

💡 Research Summary

This paper presents the design, implementation, and evaluation of a novel LLVM-based optimization pipeline aimed at addressing key performance and usability bottlenecks in actively secure arithmetic Multi-Party Computation (MPC), specifically for the SPDZ protocol family.

The authors identify three core limitations in current MPC frameworks: 1) reliance on framework-specific compilation stacks that reinvent compiler wheels, 2) the need for programmers to explicitly express parallelism, and 3) high communication overhead that dominates runtime. To overcome these, they propose a proof-of-concept pipeline that deeply integrates the mature LLVM compiler infrastructure.

The pipeline begins with a programmer-friendly front-end that accepts a subset of C annotated with lightweight privacy attributes (e.g., private, public). This code is compiled to LLVM Intermediate Representation (IR) using standard tools like Clang with optimizations (-O2) enabled. Leveraging LLVM’s powerful middle-end, the pipeline applies protocol-agnostic optimizations such as vectorization, constant propagation, and dead-code elimination. This step simplifies the arithmetic circuit and exposes opportunities for parallel execution automatically, removing the burden from the programmer.

The optimized LLVM IR, which is in Static Single Assignment (SSA) form, is then analyzed to construct a data-flow graph (DFG) and control-flow graph (CFG). The SSA form makes data dependencies explicit, allowing the system to accurately identify independent operations that can be batched together. This analysis forms the foundation for a sophisticated runtime scheduler.

The runtime features a non-blocking scheduler that uses the DFG/CFG information to group independent operations into batches. It aggressively overlaps different types of work: local linear operations (additions), interactive non-linear operations (multiplications using Beaver triples), and communication phases (opening masked values). This overlapping is crucial for hiding communication latency. The scheduler interfaces with pluggable back-ends. Batched operations are lowered to contiguous buffers and dispatched either to a SIMD-optimized CPU back-end or mapped to GPU kernels when a GPU back-end is enabled.

The evaluation focuses on the online phase performance using a linear-layer microbenchmark and compares against the state-of-the-art MP-SPDZ framework. The results are compelling. The CPU back-end achieves speedups of up to 5.56x over MP-SPDZ under intermediate and heavy algebraic workloads. It also demonstrates strong scaling with the number of threads, with benefits plateauing after 8 threads. The GPU back-end, while not competitive at very small input sizes, shows more favorable scaling as input size increases and eventually outperforms MP-SPDZ for larger problems.

In summary, this work demonstrates that borrowing from mature compiler technology (LLVM) and combining it with protocol-aware scheduling and flexible hardware mapping is a highly effective architectural strategy for MPC. It successfully shifts the optimization burden from the programmer to the compiler/runtime system, significantly improves online performance through batching and overlap, and maintains usability by supporting a mainstream programming language (C) with minimal extensions. The findings indicate a promising direction for building more efficient and accessible secure computation frameworks.