Magnetic flux imaging in a 3D superconductor integrated circuit

We report on imaging magnetic flux distributions in a multilayered superconductor integrated circuit which emerge during magnetization and after field cooling of the circuit in the DC magnetic field. The obtained complicated field maps expose the flux propagation across the patterned superconducting ground planes sandwiching layers with Josephson junction-based logic cells, fine wire grid around the functional units, and multiple superconducting fill structures located in different inner layers. The observed intricate flux distributions are explained by specific patterns of Meissner screening currents and superconducting critical currents in different mutually interacting parts of the integrated circuit. Our results provide important insights into possible ways of improving the protection of superconductor integrated circuits from magnetic fields and their resilience against flux trapping.

💡 Research Summary

This paper presents the first comprehensive magnetic‑flux imaging of a multilayer Nb superconducting integrated circuit (IC) using magneto‑optical imaging (MOI). The device, fabricated in the MIT‑Lincoln Laboratory SFQ5ee process, comprises eight superconducting layers (M0–M7) that host a 5 mm × 5 mm, 3‑bit‑cell shift register containing 4,513 cells. Each cell includes four resistively shunted Josephson junctions, four inductors, and an AC bias transformer. The circuit architecture features patterned ground‑plane strips (GP‑strips) perforated by 1 µm wide slits (moats) with periodic V‑bridges, a 2 µm‑wide wire grid (W‑grid) on layer M4 that interconnects the ground planes, and 6 µm square “fill” structures (S‑squares) distributed across all layers for planarization.

MOI was performed at 5 K with a garnet indicator film placed directly on the chip surface. The magnetic field was applied perpendicular to the chip (Bz) in three protocols: (i) zero‑field‑cooled (ZFC) magnetization with a slowly ramped field, (ii) decreasing field after a maximum, and (iii) field‑cooled (FC) cooling in a constant field. The resulting Bz(r) maps reveal a rich hierarchy of flux phenomena that are directly linked to the three‑dimensional layout of the circuit.

In the ZFC case, flux first penetrates at the periphery, concentrating around the large contact pads. This concentration is caused by Meissner screening currents that expel field from the pads, producing bright rectangular bands in the MO images. The W‑grid wires carry unidirectional screening currents that create bright horizontal lines of enhanced Bz between the pads and the GP‑strips. Flux then follows 45° diagonal channels through the W‑grid, a consequence of current crowding at the grid cell corners, which guides the magnetic field toward the ground‑plane strips.

Within the GP‑strips, the 1 µm slits (U‑slits that reach the strip edge and C‑slits that are interior) display markedly different flux entry behavior. Near each V‑bridge, Bz shows a sign change: a bright region on the side of the bridge facing the edge and a dark region on the opposite side. This reflects the bending of superconducting currents around the bridge, generating local fields that oppose the applied field. When the local current density reaches the critical value Jc, Abrikosov vortices cross the bridge, delivering a quantum of flux into the adjacent slit. Because the V‑bridges are serially connected along a U‑slit, this process repeats, producing a bead‑like chain of flux that fills the entire U‑line rapidly. C‑slits, lacking such a bridge‑enhanced current density, fill more slowly. The resulting pattern—bright “beads” along U‑lines and weaker contrast along C‑lines—is a hallmark of the critical‑state dynamics in a highly anisotropic, perforated superconductor.

As the external field increases, the flux front advances from the edges toward the interior, eventually saturating the entire GP‑strip network. The overall front shape resembles the classic “X‑shaped” critical‑state profile of a strongly anisotropic slab with a weak transverse critical current. Upon decreasing the field, flux retreats along the same slit pathways, confirming that the slits act as preferred channels for both entry and exit.

Field‑cooled experiments show that, when the sample is cooled in a constant Bz, flux becomes trapped in the slits, the S‑squares, and around the contact pads. The trapped regions appear as a mixture of bright spots (positive Bz) and surrounding dark halos (negative Bz), indicating local field reversal due to persistent screening currents. This trapped flux can cause logic errors or reduce the operating margins of superconducting digital circuits, especially in environments where complete magnetic shielding is impractical.

The authors interpret all observations with a critical‑state model that incorporates layer‑specific critical current densities, Meissner screening, and the geometry‑induced current crowding at corners and bridges. By correlating the MOI data with the known layout, they extract quantitative estimates of Jc for the various Nb layers and identify the most vulnerable structures (the V‑bridges and the W‑grid corners).

The study provides several practical design insights: (1) reducing the width or number of V‑bridges, or rounding their corners, can suppress the local current spikes that trigger vortex entry; (2) increasing the spacing between the W‑grid and the ground‑plane strips diminishes the formation of diagonal flux channels; (3) engineering the fill‑square layout to provide more uniform shielding can limit flux penetration into interior layers; and (4) implementing additional shielding layers or patterned antidots above the most vulnerable planes can raise the effective Jc and improve resilience.

In summary, this work delivers the first direct visualization of magnetic‑flux dynamics in a realistic three‑dimensional superconducting IC, elucidates the interplay between Meissner screening, critical currents, and geometric features, and offers concrete guidelines for mitigating flux trapping in future superconducting digital and quantum hardware.