Realizing Lattice Surgery on Two Distance-Three Repetition Codes with Superconducting Qubits

Quantum error correction is needed for quantum computers to be capable of fault-tolerantly executing algorithms using hundreds of logical qubits. Recent experiments have demonstrated subthreshold error rates for state preservation of a single logical qubit. In addition, the realization of universal quantum computation requires the implementation of logical entangling gates. Lattice surgery offers a practical approach for implementing such gates, particularly in planar quantum processor layouts. In this work, we demonstrate lattice surgery between two distance-three repetition-code qubits by splitting a single distance-three surface-code qubit. Using a quantum circuit fault-tolerant to bit-flip errors, we achieve an improvement in the value of the decoded $ZZ$ logical two-qubit observable compared to a similar non-encoded circuit. By preparing the surface-code qubit in initial states parametrized by a varying polar angle, we evaluate the performance of the lattice surgery operation for non-cardinal states on the logical Bloch sphere and employ logical two-qubit tomography to reconstruct the Pauli transfer matrix of the operation. In this way, we demonstrate the functional building blocks needed for lattice surgery operations on larger-distance codes based on superconducting circuits.

💡 Research Summary

This paper reports the first experimental demonstration of lattice‑surgery–based logical entangling operations on a superconducting quantum processor using distance‑three surface‑code qubits that are split into two distance‑three repetition‑code logical qubits. The authors implement a fault‑tolerant X‑type split operation on a 3 × 3 rotated surface code realized with 17 transmon qubits. The surface code’s stabilizers are measured in alternating cycles of X‑type and Z‑type checks; after four X‑type cycles (m + 1 = 4) the middle column of data qubits is read out in the Z basis and X‑type checks are halted, effecting a code deformation that leaves the remaining data qubits and Z‑type checks as two independent three‑qubit bit‑flip repetition codes. Logical operators for the two new codes are defined as ZL₁ = Z_D4, XL₁ = X_D1 X_D4 X_D7 and ZL₂ = Z_D6, XL₂ = X_D3 X_D6 X_D9.

A deterministic version of the split is realized by applying Pauli‑frame updates conditioned on the outcomes of the auxiliary measurements (sX₂ sX₄, sX₁ sX₃, and the central data‑qubit readout z_D5). In the ideal, error‑free case the operation implements a Hadamard‑transformed fan‑out gate: α|+⟩ + β|−⟩ → α|++⟩ + β|−−⟩. The experiment prepares the logical surface‑code qubit in |0⟩_L and in a set of non‑cardinal states parametrized by a polar angle on the Bloch sphere, enabling a full characterization of the logical two‑qubit map.

Hardware performance is characterized by single‑qubit gate error 0.09 % ± 0.05, two‑qubit CZ error 2.2 % ± 1.7, and readout assignment fidelities of 98.5 % (two‑state) and 97.5 % (three‑state). Repeated stabilizer cycles yield average syndrome error rates of 0.182 for weight‑four and 0.114 for weight‑two checks, confirming that the device operates below the surface‑code threshold.

Logical observables are extracted both raw and after minimum‑weight perfect‑matching (MWPM) decoding of the Z‑type syndrome data. For the Bell‑state preparation (splitting |0⟩_L), the raw expectation value of ZL₁ ZL₂ is 0.189(5); after MWPM decoding it rises to 0.730(3), and post‑selection on error‑free syndrome histories pushes it to 0.998(1), essentially the ideal value. The X‑type observable XL₁ XL₂ improves modestly (0.255 → 0.56) while the Y‑type observable YL₁ YL₂ degrades due to undetectable phase‑flip errors, reflecting the fact that the split protocol is only fault‑tolerant against bit‑flip errors. Correspondingly, the Bell‑state fidelity improves from 0.382(2) raw to 0.546(2) decoded, and to 0.780(6) after post‑selection.

To benchmark the benefit of error correction, a non‑encoded variant of the split using only three data qubits and two auxiliary X‑type qubits is performed. This unprotected version yields a ZL₁ ZL₂ expectation of 0.591(8), significantly lower than the 0.730(3) achieved with the full error‑corrected protocol, confirming the advantage of the stabilizer‑based protection.

The authors also reconstruct the full Pauli transfer matrix of the logical two‑qubit operation by performing logical two‑qubit tomography on a set of input states spanning the Bloch sphere. The experimentally obtained transfer matrix closely matches a Pauli‑error model built from independently measured gate and coherence parameters, indicating that the dominant error sources are well captured by the simple error model.

Key insights from the work include: (1) a concrete, hardware‑level implementation of a lattice‑surgery split that converts a single logical qubit into two independent logical qubits while preserving fault‑tolerance to bit‑flip errors; (2) demonstration that syndrome correlation analysis shows negligible cross‑talk between the two resulting repetition codes, supporting the scalability of parallel logical qubits; (3) validation that Pauli‑frame updates enable deterministic logical outcomes without the need for active feed‑forward; and (4) provision of a full logical process tomography that serves as a benchmark for future, higher‑distance lattice‑surgery primitives such as logical CNOTs and magic‑state distillation.

Overall, the paper establishes the functional building blocks required for scalable lattice‑surgery operations on superconducting platforms. While phase‑flip errors remain uncorrected in the present protocol, the authors outline a clear path toward full fault‑tolerance by incorporating X‑type stabilizer measurements after the split. The demonstrated techniques pave the way for extending lattice surgery to larger distances (d ≥ 5) and multiple logical qubits, bringing fault‑tolerant universal quantum computation on superconducting hardware closer to reality.