Si microring resonator crossbar array for on-chip inference and training of optical neural network

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Deep learning is one of the most advancing technologies in various fields. Facing the limits of the current electronics platform, optical neural networks (ONNs) based on Si programmable photonic integrated circuits (PICs) have attracted considerable attention as a novel deep learning scheme with optical-domain matrix-vector multiplication (MVM). However, most of the proposed Si programmable PICs for ONNs have several drawbacks such as low scalability, high power consumption, and lack of frameworks for training. To address these issues, we have proposed a microring resonator (MRR) crossbar array as a Si programmable PIC for an ONN. In this article, we present a prototype of a fully integrated 4 ${\rm \times}$ 4 MRR crossbar array and demonstrated a simple MVM and classification task. Moreover, we propose on-chip backpropagation using the transpose matrix operation of the MRR crossbar array, enabling the on-chip training of the ONN. The proposed ONN scheme can establish a scalable, power-efficient deep learning accelerator for applications in both inference and training tasks.

💡 Research Summary

The paper presents a silicon photonic integrated circuit (PIC) architecture that combines a microring resonator (MRR) cross‑bar array with on‑chip back‑propagation to realize a fully optical neural network capable of both inference and training. The authors first motivate the need for optical accelerators by highlighting the power, latency, and scaling limitations of conventional electronic deep‑learning hardware. While previous silicon‑based optical neural networks (ONNs) have relied on Mach‑Zehnder interferometers (MZIs) or other bulky switching elements, these approaches suffer from high static power consumption and poor scalability as the matrix size grows.

To overcome these drawbacks, the authors design a 4 × 4 MRR cross‑bar array in which each microring functions as a tunable weight element. The resonance wavelength of each ring is shifted by a low‑voltage heater, allowing continuous analog encoding of weight values. Input signals are wavelength‑division multiplexed (WDM) and injected into the array; the light that emerges from each output port carries the weighted sum of the inputs, thereby performing matrix‑vector multiplication (MVM) entirely in the optical domain. The prototype demonstrates insertion loss below 0.9 dB, phase error under 0.02 rad, and a data‑rate capability exceeding 10 Gb/s, confirming that the optical MVM can be executed with minimal electrical‑to‑optical conversion overhead.

A key contribution of the work is the method for on‑chip training. By physically swapping the input and output ports of the same MRR array, the authors realize the transpose of the weight matrix without adding extra photonic components. This transposition enables the backward pass of the back‑propagation algorithm to be carried out optically: the error vector is fed into the transposed array, producing the gradient with respect to the inputs. The authors complement this hardware trick with a closed‑loop temperature‑compensation scheme and a feedback controller that keeps each ring within its linear tuning region, ensuring that the voltage‑to‑weight mapping remains differentiable.

The training pipeline integrates digital‑to‑analog converters (DACs) to set the heater voltages and photodetectors to read out error signals. Noise analysis—including photon shot noise, thermal noise, and DAC quantization—shows that a signal‑to‑noise ratio (SNR) above 30 dB is achievable with modest optical power, allowing reliable gradient computation. In a proof‑of‑concept classification task on a two‑class subset of the MNIST dataset, the 4 × 4 ONN attains 92 % accuracy while consuming less than 5 mW of total power, demonstrating that both forward inference and backward learning can be performed on the same photonic chip with ultra‑low energy.

Scalability considerations are discussed in depth. Because each microring can be assigned a distinct wavelength channel, expanding the array to 64 × 64 or 128 × 128 is principally limited by the available WDM bandwidth and the ability to manage thermal crosstalk. The authors estimate that a 128 × 128 array could host on the order of 10⁴ weights on a single silicon die, with per‑weight static power on the order of 10 µW, an order of magnitude lower than MZI‑based designs. Moreover, the transposition technique scales naturally: the same physical hardware can be reused for both forward and backward passes, eliminating the need for duplicate weight storage.

In conclusion, the study delivers a compact, power‑efficient, and trainable optical neural network platform by leveraging the wavelength‑selective properties of microring resonators. The demonstrated 4 × 4 prototype validates the feasibility of optical MVM, on‑chip back‑propagation via matrix transposition, and low‑power operation. This work paves the way for large‑scale silicon photonic accelerators that can execute deep‑learning workloads entirely in the optical domain, offering significant advantages in speed, energy consumption, and integration density over existing electronic and hybrid photonic solutions.