Synaptic Integration of Spatiotemporal Features with a Dynamic Neuromorphic Processor

Spiking neurons can perform spatiotemporal feature detection by nonlinear synaptic and dendritic integration of presynaptic spike patterns. Multicompartment models of non-linear dendrites and related neuromorphic circuit designs enable faithful imitation of such dynamic integration processes, but these approaches are also associated with a relatively high computing cost or circuit size. Here, we investigate synaptic integration of spatiotemporal spike patterns with multiple dynamic synapses on point-neurons in the DYNAP-SE neuromorphic processor, which offers a complementary resource-efficient, albeit less flexible, approach to feature detection. We investigate how previously proposed excitatory–inhibitory pairs of dynamic synapses can be combined to integrate multiple inputs, and we generalize that concept to a case in which one inhibitory synapse is combined with multiple excitatory synapses. We characterize the resulting delayed excitatory postsynaptic potentials (EPSPs) by measuring and analyzing the membrane potentials of the neuromorphic neuronal circuits. We find that biologically relevant EPSP delays, with variability of order 10 milliseconds per neuron, can be realized in the proposed manner by selecting different synapse combinations, thanks to device mismatch. Based on these results, we demonstrate that a single point-neuron with dynamic synapses in the DYNAP-SE can respond selectively to presynaptic spikes with a particular spatiotemporal structure, which enables, for instance, visual feature tuning of single neurons.

💡 Research Summary

This paper investigates how spatiotemporal feature detection can be achieved on a resource‑efficient neuromorphic processor, the DYNAP‑SE, using only point‑neuron circuits equipped with dynamic synapses. Classical approaches that emulate dendritic integration rely on multi‑compartment models, which, while biologically faithful, demand substantial silicon area and power. The authors propose a complementary strategy: they exploit the processor’s Differential Pair Integrator (DPI) synapses—four types per neuron (fast/slow excitatory, subtractive/shunting inhibitory)—to construct “disynaptic delay elements” composed of an excitatory–inhibitory pair. By configuring the inhibitory synapse with a short time constant and the excitatory synapse with a longer one, the inhibitory current decays first, leaving a delayed excitatory postsynaptic potential (EPSP) that can be tuned to tens of milliseconds.

The hardware platform consists of four 256‑core chips, each core containing 256 Adaptive Exponential Integrate‑and‑Fire (AdEx) neurons. Each neuron has 64 CAM entries that map presynaptic addresses to four DPI synapses. The analog dynamics are governed by 25 programmable bias parameters per core; Table I lists the specific bias settings used to realize the disynaptic delays. Because the DPI circuits operate in the sub‑threshold regime, device mismatch inevitably creates a distribution of time constants across CAM entries and across neurons, which the authors turn into an advantage: a single neuron can host several delay elements with distinct latencies (approximately 5–15 ms and 10–20 ms in the measured data).

Two experimental configurations are presented to demonstrate selective spatiotemporal pattern detection. In the “pair‑selective” circuit, a single neuron receives spikes through two disynaptic delay elements. The input pattern consists of two spikes, each routed to a different delay element, with an inter‑spike interval (ISI) that can be varied. An offline Hebbian‑like learning rule is used to select the pair of CAM entries that produce maximal membrane depolarization for a target ISI (e.g., 12 ms). Empirical results show a pronounced increase in firing probability for the trained ISI range, while shorter or longer intervals elicit little or no response.

In the “triplet‑selective” circuit, the neuron is connected to three slow excitatory synapses and one fast subtractive inhibitory synapse. The stimulus consists of three excitatory spikes spaced by a constant ISI, together with a simultaneous inhibitory spike. The inhibitory pulse suppresses early excitation; as it decays, the overlapping delayed EPSPs from the three excitatory synapses sum, producing a sharp membrane peak only when the ISI matches the combined delay differences. Again, a Hebbian‑style selection of synapses yields a neuron that fires robustly for a narrow ISI band (e.g., 4–6 ms) and remains silent otherwise.

The authors discuss the implications of their findings. Advantages include (1) minimal silicon footprint and low power consumption compared with multi‑compartment dendritic circuits, (2) exploitation of intrinsic analog variability to obtain a spectrum of temporal filters without extra hardware, and (3) compatibility with existing spiking neural network (SNN) toolchains because the implementation relies on standard point‑neuron primitives. Limitations are also acknowledged: the delay values are not precisely controllable due to device mismatch, the approach cannot reproduce the full non‑linear spatial integration of real dendrites, and the current learning scheme is offline, limiting online adaptability.

Future work is suggested in three directions: (i) incorporating digital calibration loops to fine‑tune individual synaptic time constants, (ii) embedding on‑chip plasticity mechanisms such as spike‑timing‑dependent plasticity (STDP) to enable online learning of the optimal synapse‑CAM mapping, and (iii) scaling the concept to networks of neurons to explore collective spatiotemporal filtering and hierarchical feature extraction for event‑based vision or auditory processing.

In summary, the study demonstrates that a single point‑neuron on the DYNAP‑SE, equipped with carefully configured dynamic excitatory and inhibitory synapses, can act as a compact, low‑power spatiotemporal feature detector. By leveraging analog device mismatch to generate a distribution of EPSP delays, the system can selectively respond to specific temporal patterns, offering a promising building block for neuromorphic sensory systems where latency and energy efficiency are critical.