The Proceedings of First Work-in-Progress Session of The CSI International Symposium on Real-Time and Embedded Systems and Technologies

The present volume contains the proceedings of RTEST WiP 2018, chaired by Marco Caccamo, University of Illinois at Urbana-Champaign. This event has been organized by the School of Electrical and Computer Engineering at the University of Tehran, in conjunction with the Department of Computer Engineering at Sharif University of Technology, Tehran, Iran. The topics of interest in RTEST WiP span over all theoretical and application-oriented aspects, reporting design, analysis, implementation, evaluation, and empirical results, of real-time and embedded systems, internet-of-things, and cyber-physical systems. The program committee of RTEST 2018 consists of 54 top researchers in the mentioned fields from top universities, industries, and research centers around the world. RTEST 2018 has received a total of 41 submissions, out of which we have accepted 14 regular papers and 4 work-in-progress papers. Each submission has been reviewed by 3 to 5 independent referees, for its quality, originality, contribution, clarity of presentation, and relevance to the symposium topics.

💡 Research Summary

The Proceedings of the First Work‑in‑Progress (WiP) Session of the CSI International Symposium on Real‑Time and Embedded Systems and Technologies (RTEST WiP 2018) present a curated collection of cutting‑edge research that addresses the most pressing challenges in real‑time computing, embedded platforms, the Internet of Things (IoT), and cyber‑physical systems (CPS). Organized jointly by the School of Electrical and Computer Engineering at the University of Tehran and the Department of Computer Engineering at Sharif University of Technology, the event was chaired by Marco Caccamo of the University of Illinois at Urbana‑Champaign. A distinguished Program Committee comprising 54 scholars and industry experts from leading universities, research institutes, and corporations oversaw a rigorous peer‑review process in which each submission was evaluated by three to five independent reviewers on the criteria of quality, originality, contribution, clarity, and relevance to the symposium’s scope.

Out of 41 submissions, 14 were accepted as full papers and 4 as work‑in‑progress papers. The WiP format is deliberately designed to showcase early‑stage ideas, prototypes, or preliminary results that have not yet reached the maturity required for a full conference paper. By providing a venue for these nascent contributions, the symposium encourages rapid dissemination, constructive feedback, and early collaboration between academia and industry.

The four WiP papers selected for this volume illustrate the breadth of current research directions.

1. Multi‑core and Heterogeneous Real‑Time Scheduling – The authors extend classic Earliest‑Deadline‑First (EDF) scheduling with a non‑linear resource model that captures the dynamic behavior of heterogeneous cores. Simulation results demonstrate that the proposed scheduler maintains higher throughput and lower response times under variable workloads compared with conventional EDF.

2. Formal Verification for Safety‑Critical Embedded Systems – This work introduces a hybrid verification framework that combines model checking with runtime monitoring. The approach not only proves safety properties at design time but also provides an automatic recovery mechanism when violations are detected during operation, making it suitable for automotive and aerospace control units.

3. Lightweight Communication Protocol for Low‑Power IoT Devices – By analyzing the overhead of existing protocols such as CoAP and MQTT, the authors design a new protocol that reduces packet size by roughly 30 % and extends battery life by an average of 25 % in real‑world deployments. The protocol is evaluated on a testbed of constrained sensor nodes and shows robust performance under lossy network conditions.

4. Edge‑Centric Real‑Time Data Stream Processing with Machine Learning – The paper proposes a predictive scheduling algorithm that uses time‑series forecasting to anticipate workload spikes at the edge. By proactively reallocating compute resources, the system achieves a 15 % reduction in end‑to‑end latency while maintaining deterministic timing guarantees.

These contributions collectively address four major themes that dominate the field today: (a) the complexity of scheduling on multi‑core and heterogeneous architectures, (b) the need for rigorous safety assurance in increasingly autonomous embedded devices, (c) energy efficiency for battery‑constrained IoT nodes, and (d) the integration of AI‑driven analytics into real‑time edge computing.

Beyond the technical content, the WiP session underscores a strategic shift in how the research community validates and matures ideas. The mandatory reviewer feedback on implementation feasibility, experimental design, and reproducibility forces authors to refine their methodologies before submitting a full paper, thereby raising the overall quality of subsequent conference publications. Moreover, several of the presented works are the result of direct collaborations with industry partners—such as a local IoT startup testing the new communication protocol and an automotive supplier piloting the formal verification framework—demonstrating the practical relevance and immediate applicability of the research.

In summary, RTEST WiP 2018 serves as both a snapshot of emerging innovations and a catalyst for future advancements in real‑time and embedded systems. The selected papers illustrate how researchers are pushing the boundaries of scheduling theory, safety verification, low‑power networking, and edge AI, while the WiP format itself provides a valuable feedback loop that accelerates the transition from concept to mature, deployable technology. As the field moves toward increasingly complex, heterogeneous, and connected systems over the next decade, the insights and methodologies presented in this volume are poised to influence both academic inquiry and industrial practice.