A Logic for True Concurrency

We propose a logic for true concurrency whose formulae predicate about events in computations and their causal dependencies. The induced logical equivalence is hereditary history preserving bisimilarity, and fragments of the logic can be identified which correspond to other true concurrent behavioural equivalences in the literature: step, pomset and history preserving bisimilarity. Standard Hennessy-Milner logic, and thus (interleaving) bisimilarity, is also recovered as a fragment. We also propose an extension of the logic with fixpoint operators, thus allowing to describe causal and concurrency properties of infinite computations. We believe that this work contributes to a rational presentation of the true concurrent spectrum and to a deeper understanding of the relations between the involved behavioural equivalences.

💡 Research Summary

The paper introduces a novel modal logic designed explicitly for true concurrency, where the fundamental entities are events rather than interleaved actions. Traditional process algebras and Hennessy‑Milner logic (HML) treat concurrent systems as nondeterministic interleavings of atomic steps, thereby abstracting away the causal and independence relations that are intrinsic to genuinely concurrent computations. To overcome this limitation, the authors base their logic on event structures—a well‑established model that captures events, a partial order of causality, and a conflict relation that prevents incompatible events from co‑occurring.

The syntax extends classic propositional constructs (¬, ∧, ∨) with three families of operators that directly refer to concurrency concepts: (i) a “precedence” modality a ≤ φ, meaning that event a has already occurred in the current configuration and, after its occurrence, φ holds; (ii) a “concurrency” modality a ‖ b, asserting that a and b are independent and can be present together; and (iii) a standard action modality ⟨α⟩φ, indicating that an event labelled α can be performed next and φ will then be satisfied. Configurations—down‑closed, conflict‑free sets of events—serve as the semantic worlds. Satisfaction ⊨ is defined inductively on configurations, with the precedence and concurrency modalities checking the presence of events and the preservation of the partial order.

The central technical result is that logical equivalence induced by this logic coincides exactly with hereditary history‑preserving bisimilarity (HHPB). HHPB is the most discriminating equivalence in the true‑concurrency spectrum: it requires a bisimulation relation that respects not only the current set of events but also the entire causal history, and it is closed under taking sub‑configurations (hence “hereditary”). The authors prove two directions: (1) if two systems are HHPB‑equivalent then they satisfy the same formulas, by constructing a formula‑preserving back‑and‑forth simulation; (2) conversely, if they satisfy the same formulas, a relation can be extracted that satisfies the HHPB conditions. This establishes the logic as a characteristic logic for HHPB.

Beyond the full logic, the paper identifies natural fragments that capture weaker behavioural equivalences. Removing the precedence modality while keeping concurrency yields a logic whose equivalence is step bisimilarity (which only cares about sets of concurrently executable actions). Conversely, dropping concurrency but retaining precedence gives a logic equivalent to pomset bisimilarity, which respects causal ordering but not the full hereditary property. Finally, eliminating both specialised modalities reduces the logic to ordinary HML, recovering classic interleaving bisimilarity. Thus, the authors provide a unified logical framework that maps cleanly onto the established hierarchy of true‑concurrency equivalences.

To handle infinite behaviours, the authors extend the logic with least and greatest fixed‑point operators (μ and ν), forming a true‑concurrency μ‑calculus. This extension enables the expression of liveness, safety, and fairness properties over infinite event structures while still preserving the correspondence with HHPB. The paper demonstrates that the fixed‑point logic remains expressive enough to define all HHPB‑invariant properties and that the standard model‑checking techniques for μ‑calculi can, in principle, be adapted to the event‑structure setting.

The theoretical developments are illustrated through two case studies. The first models a traffic‑light controller as an event structure, where green, yellow, and red phases are events with causal dependencies. Using the logic, the authors verify that the controller never allows green and red simultaneously (a concurrency safety property) and that every green phase is eventually followed by a red phase (a liveness property expressed via a fixed point). The second case study concerns a simple production line with parallel assembly stations. Here the logic proves that certain assembly steps can proceed concurrently without deadlock and that the causal order of component integration is respected throughout the infinite production cycle.

In the discussion, the authors outline future research directions: (a) developing automated model‑checking tools that can evaluate the proposed logic on large event‑structure models; (b) investigating succinct normal forms or formula minimisation techniques to improve scalability; (c) extending the framework to richer models such as probabilistic, timed, or stochastic event structures; and (d) exploring compositional reasoning principles that would allow modular verification of complex systems.

Overall, the paper makes a substantial contribution by delivering a logic that is both expressive enough to capture the most discriminating true‑concurrency equivalence (HHPB) and flexible enough to be restricted to weaker equivalences. The addition of fixed‑point operators further bridges the gap between finite‑state reasoning and the analysis of infinite, ongoing concurrent systems. This work therefore advances both the theoretical understanding of the true‑concurrency spectrum and the practical toolbox available for formal verification of genuinely concurrent software and hardware systems.