From LTL and Limit-Deterministic B"uchi Automata to Deterministic Parity Automata
Controller synthesis for general linear temporal logic (LTL) objectives is a challenging task. The standard approach involves translating the LTL objective into a deterministic parity automaton (DPA) by means of the Safra-Piterman construction. One of the challenges is the size of the DPA, which often grows very fast in practice, and can reach double exponential size in the length of the LTL formula. In this paper we describe a single exponential translation from limit-deterministic B"uchi automata (LDBA) to DPA, and show that it can be concatenated with a recent efficient translation from LTL to LDBA to yield a double exponential, \enquote{Safraless} LTL-to-DPA construction. We also report on an implementation, a comparison with the SPOT library, and performance on several sets of formulas, including instances from the 2016 SyntComp competition.
💡 Research Summary
The paper addresses the long‑standing difficulty of synthesizing controllers for specifications given in full linear temporal logic (LTL). The traditional pipeline translates an LTL formula into a deterministic parity automaton (DPA) via the Safra‑Piterman construction. Although theoretically sound, this construction often yields automata whose size grows double‑exponentially in the length of the formula, making it impractical for many real‑world instances.
The authors propose a two‑stage “Safraless” approach that replaces the Safra‑Piterman step with a more efficient translation based on limit‑deterministic Büchi automata (LDBA). An LDBA consists of a nondeterministic prefix that eventually enters a deterministic “trap” component Qₙ, and all accepting transitions are confined to this deterministic part. This structure is expressive enough to capture any ω‑regular language, yet it retains enough determinism to enable efficient further processing.
Stage 1 – LDBA → DPA (single‑exponential).
Given an LDBA A = (Q, Qₙ, q₀, Σ, δ, α), the authors construct a run‑directed‑acyclic‑graph (run‑DAG) G₍w₎ for each infinite word w. Vertices are pairs (q,i) indicating that state q is reachable after i letters. The deterministic trap Qₙ is equipped with a total order Ord, which induces a total order @ᵢ on the vertices of each level i that belong to Qₙ. Two kinds of events are monitored:
- Positive event: an accepting transition (q,σ,q′) ∈ α is taken at level i. The smallest index of a vertex that triggers such a transition determines an even color.
- Negative event: a run in Qₙ merges with a strictly smaller run (according to Ord). This generates an odd color that “cancels” previously emitted even colors.
Colors range from 1 to 2·|Qₙ|+1. The color assigned to the transition between level i and i+1 follows a case distinction based on whether Dec(Vᵢ) (vertices whose successor has a smaller index) and Acc(Vᵢ) (vertices that fire an accepting transition) are empty. The color summary of G₍w₎ is defined as the minimal color that appears infinitely often along the run. The authors prove (Theorem 1) that the color summary is even iff G₍w₎ contains an accepting run, i.e., iff w is accepted by the original LDBA. Because each run in Qₙ can merge at most |Qₙ|−1 times, the number of distinct color patterns is bounded by 2·|Qₙ|+1, yielding a deterministic parity automaton whose state space is O(2^{|Qₙ|}·|Q|). This is a single‑exponential blow‑up relative to the size of the LDBA.
Stage 2 – LTL → LDBA (double‑exponential).
The second stage uses the recent translation from LTL to LDBA described in
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