Pinhole induced efficiency variation in perovskite solar cells

📝 Abstract

Process induced efficiency variation is a major concern for all thin film solar cells, including the emerging perovskite based solar cells. In this manuscript, we address the effect of pinholes or process induced surface coverage aspects on the efficiency of such solar cells through detailed numerical simulations. Interestingly, we find the pinhole size distribution affects the short circuit current and open circuit voltage in contrasting manners. Specifically, while the Jsc is heavily dependent on the pinhole size distribution, surprisingly, the Voc seems to be only nominally affected by it. Further, our simulations also indicate that, with appropriate interface engineering, it is indeed possible to design a nanostructured device with efficiencies comparable to that of ideal planar structures. Additionally, we propose a simple technique based on terminal IV characteristics to estimate the surface coverage in perovskite solar cells.

💡 Analysis

Process induced efficiency variation is a major concern for all thin film solar cells, including the emerging perovskite based solar cells. In this manuscript, we address the effect of pinholes or process induced surface coverage aspects on the efficiency of such solar cells through detailed numerical simulations. Interestingly, we find the pinhole size distribution affects the short circuit current and open circuit voltage in contrasting manners. Specifically, while the Jsc is heavily dependent on the pinhole size distribution, surprisingly, the Voc seems to be only nominally affected by it. Further, our simulations also indicate that, with appropriate interface engineering, it is indeed possible to design a nanostructured device with efficiencies comparable to that of ideal planar structures. Additionally, we propose a simple technique based on terminal IV characteristics to estimate the surface coverage in perovskite solar cells.

📄 Content

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Pinhole induced efficiency variation in perovskite solar cells Sumanshu Agarwal1 and Pradeep R. Nair2 1Department of Energy Science and Engineering, 2Department of Electrical Engineering
Indian Institute of Technology Bombay, Mumbai, Maharashtra, 400076, India sumanshu@iitb.ac.in, prnair@ee.iitb.ac.in

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Abstract: Process induced efficiency variation is a major concern for all thin film solar cells, including the emerging perovskite based solar cells. In this manuscript, we address the effect of pinholes or process induced surface coverage aspects on the efficiency of such solar cells through detailed numerical simulations. Interestingly, we find the pinhole size distribution affects the short circuit current and open circuit voltage in contrasting manners. Specifically, while the 𝐽𝑆𝐶 is heavily dependent on the pinhole size distribution, surprisingly, the 𝑉𝑂𝐶 seems to be only nominally affected by it. Further, our simulations also indicate that, with appropriate interface engineering, it is indeed possible to design a nanostructured device with efficiencies comparable to that of ideal planar structures. Additionally, we propose a simple technique based on terminal I –V characteristics to estimate the surface coverage in perovskite solar cells. Keywords – surface coverage; nanostructure solar cell; thin film solar cell; optical analysis; electrical analysis; optimization

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1. Introduction Perovskite solar cells have gained immense research interest in last few years mainly because of its high energy conversion efficiency[1,2]. Though state of the art efficiency for this class of solar cells is more than 20%[3,4], large variations in performances of the devices fabricated in different laboratories have been reported[5–13]. Poor morphological control[14,15] and bad surface coverage of perovskite between electron and hole transport layers (ETL and HTL)[1,16] are known to have adverse effects on the performance of the devices (see Fig. 1). There have been several attempts to deposit almost pinhole free and smooth perovskite films using techniques like co-evaporation[1], use of PbAc2[17,18], PVP (poly-vinylpyrrolidone) as surfactant[19], variation in the anneal temperature[15,20] and anneal time[21], but quantitative estimates of losses due to sub-optimal surface coverage are still not available in literature.
   In this manuscript we discuss the effect of pinholes or non-ideal perovskite surface coverage on the efficiency through detailed optical and carrier transport simulations which are supported through an analytical model as well. While degradation in the performance metrics is generally anticipated due to poor surface coverage or pinholes, here we show that, surprisingly, the 𝑉𝑂𝐶 is rather independent of the pinhole size distribution and is more affected by the net surface coverage. However, the 𝐽𝑆𝐶 of the device is indeed affected by size distribution of the pinholes as well as by net surface coverage. Further, carrier recombination at ETL/HTL interface (due to the absence of perovskite between them) can have interesting implications, including near ideal performance for the devices with sub-optimal surface coverage. Below, we first describe the model system to study the effect of surface coverage on the performance of device. The model is then extended to explore the effects of bad interface between perovskite and HTL. We also propose simple schemes to estimate surface coverage from terminal I-V characteristics.

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2. Model System The structure of a perovskite solar cell is shown in figure 1 (a). Here, the perovskite is sandwiched between ETL and HTL. Non-uniform deposition of perovskite between ETL and HTL leads to empty space or direct contact between ETL and HTL as shown in cross-sectional view of perovskite solar cell (fig. 1b). These regions could result in increased recombination and affect the photon absorption properties as well. The fraction of area covered by perovskite between ETL/HTL is denoted as surface coverage (s) and the region not covered by perovskite is referred as void in this paper. Typically, poor surface coverage of Fig 1: Schematic of perovskite solar cell. (a) The layer by layer structure of a typical perovskite solar cell. (b) A schematic representation of non-ideal surface coverage in perovskite solar cells. (c) The device structure used for numerical simulations. ‘𝐰’ is the width of unit cell which indicated by dashed line.

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perovskite between ETL/HTL causes loss in performance due to: a) less absorption of photons and b) increase in the recombination at the interface[15].
As mentioned before, current literature lacks quantitative estimates of such surface coverage aspects which are required to accurately model the eventual device performance. Given this scenario, here we make a few simplifying assumptions such that the problem becomes computational

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