Design Considerations of a Sub-50 {mu}W Receiver Front-end for Implantable Devices in MedRadio Band

Abstract — Emerging health-monitor applications, such as information transmission through mu lti-channel neural imp lants, image and video communication from inside the body etc ., calls for ultra-low active power (<50µW) high da t a-rate, ener gy-scalable, highly energy-efficient (pJ/bit) radios. Previous literat u re has strongly focu sed on low a ve rage pow er duty-cycled radios or low- power but low-date radios. In this paper, we investigate power performance trade-off of each front-end co m ponent in a conventional radio including active m atc h ing, down-conversion and RF/ IF amplification and p rioritize the m based on highest performance/energy m etric. The ana lysis reveals 50Ω active matching and RF gain is prohibitive for 50 µW pow er-b u d get. A mixer-first architecture w ith an N- pa th m ix er and a self- biased inverter based b a seba nd LNA, de signed in TSMC 65nm technology sho w that sub 50µW p er formance can be achieved up to 10Mbps (< 5pJ/b) with OOK modulation . Index Terms — MedRadio, Low-power, N-path Mixer, Receiver I. I NTRODUCTI ON MPLA NTABL E devices for heal th care monitoring applications often require to op erate at extremely low po w er . Applications such as multichan n el neural implants [1 ] and ingestible image/video transceivers [2] demand high rate commun icatio n. Past works in Medical Device Radio Co mm unicatio n (MedRadio) spectrum around 40 0 MHz had offered promising opportunities in healt h ca re m onitori ng thro ugh e xtensive use of m ed ical tele m etr y at low-data-rate [3] . Yet, low-power high data-rate applications continues to be a challenge as transceiver system are size constrained and energy-spar se. For implantable use , to avoid frequent surgeri es, batteries must sustain device operation for years; hence, RF transceivers must consume low power during communicatio n. Other r equirements such a s small f orm factor, channel selectivit y and interference rejection capability still re main crucial [4] . These stringent requirement poses the need to 1 re -scr u tinize receiver architect ural performance trade-offs under the given co mm unication standards and silicon pro cess technology limits. In [5], [6] , it is shown that a high data-rate RF receiver typicall y co nsumes 1 mW @ 1 Mb ps, transla ting to 1nJ/b energy-efficienc y. Hen ce, improvement in energy-e fficiency of lo w-power hi gh data-rate wireless co m munication system is t he top priority. While recent efforts in pJ/b BAN also include human body co m munication [7] – [9] , w e w ill focus on sta ndard wireless radio in this paper. In terms of standards , short-range tra n smission on 401 -406 MHz MedRadio band is suitable for the design space of low power operation. Since communication range rarely exceed s 3 m in a B A N , sensitivity require m ents are relaxed [10]. T he free- space line- of -sight path loss (FSPL) at 403 .5 MHz can be calculated usin g Frii’s formula [11], as sho w n in [ 12], while keeping the maximum effective i sotropic r adiated power (EIRP) at -16 dB m for transmitter as per MedRad io standar ds, the minimum sensitivity required at the recei v er is about - 64 dBm, which enable s lower power operatio n. Spectrally efficient but energy in efficient modulat ion schemes are n ot desirable in such ap plications. High er order m odulation sc hemes require high er     and co m plex decod ing , he n ce higher po w er. With this cons traint, B PSK or OOK is most suitable, while OOK allo ws simpler and lower p ower receiver implementation. The goal of this paper is to explore the per f ormance trade - offs of an Ultra Low Po w er (ULP) rec eiv er front -end and to prompt f or an architecture suitable f o r sub - 50 μW receiv er implementation in the TSMC 6 5nm technolo gy. Here we present 1) the e n ergy-co st tr ade-off trends o f each front -end component such as data b andwidth and se nsitivity tr ades-off with po w er , 2) j ustif icatio n that mixer- f irst is a d esirable architecture as energ y-cost of active matching to 50 ohms is high and 3) with only baseband a m p lif ica tion 3 .4pJ/bit energy efficiency is achieved in s imulation with OOK tran smission. II. P OW ER VS . OP ERABL E F REQUENCY TRADE OFF LI M ITA TION A. Low Noise Amplifier (LN A) Design Choice Conventional LNA often e m p loys inductive so u rce degeneration. This structure is known for improved noise performance and p rovides passive matching. However, for limited power budget op eration, this structure suffers fro m low transconductance (   ) , impacting noise and gain per formance . In additio n, a larger inductor would b e required f or proper matching [ 13]. In many ULP systems, the popular choice of LNA structure is the invert er -based resistive feedback topology [13]-[14] . As shown in Figure 1, signal is also fed to the active load such that b ias curre nt is reused but the gain is boosted b y the active load’s   . It had also b een shown in [13 ] that due to increased   , such top ology has a better noise figure performance. In [1 5]-[16], lo w power consumption was achieved through Ultra -Low-Voltage (ULV) d esigns at   =0.4V and 0 .5V, respectively. However, the LNA po w er consumption is about 10 0µW in both designs. To evaluate po w er and operab le bandwidth trade -off of the LNA shown i n Figure 1 , the design was simulated in TSMC 65nm technology. The gate biasing of the NMOS is implemented by the dec oupling capacitor   , separating bias DC le vels fro m both the si gnal input and LNA o utput. T he mobility ratio of electrons and holes in 65 n m tech n ology is taken into consideration to set the widths of the P MOS and NMOS transistors, so that node    will be biased at roughly     . It is desired to have po wer consumptio n of the LNA Design Considerations of a Sub-50 μW Receiver Front-end for Implantable Devices in MedRadio Band Gregory C hang, Shovan Maity, B aibhab Chat terjee and Shreyas Sen, M ember, IEEE School of Electrical and Co mputer Engineering, Purdue Universit y , West Lafayette, India na – 47907, USA E-mail: {cha ngg, maity, bchatte, shreyas}@purdue.edu I below 30 μW for our target applications. 1) En ergy Cost of Active Matching Matching is an im porta n t factor in RF system. As shown i n [17], active matching can be employed by usin g a sh unt feedback. However, extra power is required for such shunt feedback. For the design ch oice of Figure 1, matching is realized th r ough the f ee dback resistor   . It can be shown analytically that in order to m atch to 50 Ω, high power is required as it would be limited by technology’s     . T he input impedance shown i n Eq. 2, wh ich is simplified to Eq. 3.                 (2)      󰇛      󰇜 (3) Where       ,         , and          . Given the  value for a particular technology, input imped ance matching ca n b e achieved from ( 3 ) by choosing appro p riate value of   and transistor width which controls    under a given gate b ias voltage. In [ 14] and [18] , implementation is done through 180 nm and 130 nm technologies where     is higher than to 65 nm. W hen biasing at optimum       ,  is around 10~11 for 6 5 nm. He nce when matching to 50 Ω , it could easily req uire double the power as compared to 180 nm, as it requires 󰇡      󰇢   . Although value of   does not directly impact po w er, large transistors that supports high current must be used in or der to reduce the second term. W ith this p rinciple, t he LNA is sho wn to p erform at various input impedance and gate b ias. For low resistance matchi n g su ch as 50 Ω, the PMOS is easily scaled to 600μm and NMOS at 300μ m so that     term is less than 300. Figure 2 sho w s th e power, bandwidth,   required and noise figure achie ved at various input i m ped ance. When biasing at higher     , higher bandwidth is achieved f rom the same   , but m or e power will then be consumed. This leads to an interesting observation between po w er and band w i dth trade off at different   matching schemes. I n order to ac h ieve low impedance, more power is consu med. Low impeda n ce also ex h ibits e xcess bandwidth for a 40 0MHz band receiver. Performance tunability is largely achieved by controlling the gate bias. Deriv ed from Figure 2, Fig u re 3 shows that matching to 50 Ω easily req uires at least 1 mW power and will o btain GHz band w idth. For a MedRad io transceiver design, s uch LNA would pr ove to be overly power-hungr y . Furt h er reduction in overhead band width ca n be achieved through deep sub - threshold gate bias below 0.45 V , but this would req uire unpractically large transistor device and can e xceed tech nology allowed maximum for 65nm, hence only three g ate biasing choices were investiga ted in Figure 2 and Fig ure 3 . 2) En ergy Cost of BW The p ow er consumption for the LNA varie s dir ectly to its bandwidth, as most of the power co nsumption results from the quiescent current used to bias the circuit. A highe r q uiescent current alleviates the short-channel resistance   , low ering any RC co m b ination at o utput node for voltage -voltage mode Figure 2: a) Powe r required for a given   , showing that at di ff erent LNA gate bias, increasing power was required for lower impedance matching. b) F eedback resisor varies proportionall y with given   as accordance to equation (2). c) Bandwidth increases as   is lowered, leads to an intere sting obser vation between pow er and bandw idth tr ade off at differ ent   . d) Noise fig u re of th e LNA under any   in general does not vary under matched condition. a) b) c) d) Figure 3: Power vs Bandwidth of LNA a t different   configuration. High active powe r is needed for 5 0 ohms matching and entails excess bandwidth. For μW operations, active matching need to be at kilo -o hms level and utilize passive matching n e tw ork, av oiding a ctiv e matching to 50 ohms at RF. The three points along each segament is derived from the three biasing conditio n   shown in Figure 2. Figure 1 : RF/BB Scalable LNA design w ith NMOS Gate Co n trol                 operation, expanding the band w idth closer to the techn ology allowed   . As acti ve matching had proved to be po w er hu n gry, it motivates LN A for baseband usage in radio front-end rather than RF usage. For BB - LNA, po w er and band width trade-off trend still exits. As shown in Figure 4 po w er ad justment can be done through sizi ng and gate voltage t uning. I f band w id th is limited to MHz ra nge, sub - 50 μW implementation can be achieved. T his illustrates an important band w idth -power trade off and shows that it is the desi rable d esig n for baseband LN As. B. Frequency Down conversion with N-path Passive Mixer Frequency tr anslation are a n other cr ucial co mponent in power budgeting a receiver. A s described in [19], N-path filtering with p assive mixers were first propo sed as RF frequency bandpass filter. T his technique is now often used for narrow b and do w n -conversion by u tilizing the frequenc y translation capabilit y . For s uch down-conversion design, N parallel paths of p assive switches ar e connected to one input and each path is l oaded with a capacitor. To down-conv ert properly, a non-overlappin g LO (NLO) is used to contr ol the mixing o peration, such that the b aseband capacitor is connected to only o ne path at a t ime. T he po w er consumed to op erate such device varies with bo th number of path used , size of switches and operation frequency. In this im p lementation, NLO is prod u ced f r om a divider circuit functioning as the phase generator from a LO source . Fo r front-end po wer budgeting, LO generation is n ot consid ered but phase generation is. For this purpose , two divider architectures shown in Fi gu re 6 were investigated : a conventional flip -flop based divider and a circular divider presented in [20] . Both divider generates 4-phase LO that are 90 degrees apart . These signals were fed to AND gates to produce 25% duty cy cle non - overlapping LO as shown in Figure 5b . Figure 7 shows t he power consumption co m parison bet w ee n the circular and flip- flop b ased divider architectures. It ca n b e seen that at freque ncy of inter est for RF receiver the circular divider consume s less power and hence is used for designing this receiver. Figure 4 : a) LNA ’s power varie s proportion ally with bandw i dth, w h e re large size L NA can achiev e higher bandwidth range. b) Noise figure improves as more power is consumed. c) The flat-band gain increases initially and then satura t e s with incre asing pow er consumption a) b) c) Figure 5 : a) 4-Path switches perf orm passive d ow nconversion control led by NLO, switch is i m p l emented with NMOS. b) NL O phase generation circuit. Divider generates 90 degree apart 4 - phase signl, then fed to AND gates to convert into non-ov erlapping 4-phase signals. NLO   SW1       SW2 SW3 SW4 OUT0 OUT90 OUT180 OUT270 OUT0 OUT90 4 - p h a s e D i v i d e r OUT90 OUT180 OUT180 OUT270 OUT270 OUT0 CLK CLKP RESET SW1 SW2 SW3 SW4 Divider Output NLO Output b) a) Figure 6 : a) F lip-flop based divider . b) Circular divider of [ 1 6] . Out1, out2, out3 and out4 are 4-phase 90 deg ree offse t signal OUT1 OUT2 OUT3 OUT4 CLK   D RESET Q D RESET Q D RESET Q Q Q Q RESET CLK CLKP VDD RB CLK CLKP VSS R CLKP CLK VSS R CLK CLKP VDD RB a) b) OUT1 OUT2 OUT3 OUT4 The p ow er consum ption o f the cir cular divider along with the passive mixer is simulated with supply voltage of 1V an d a load capacitance of 5pF. Fig ure 8 shows noise figure tradeo f f with dynamic p ow er of the mixer. The divider and MOS switches were simulated w ith a fixed supply voltage a nd the variation in dynamic power is obtained through variation in MOSFET size, as the ga te capacitance of the switches act as extra cap acitive load. From Figure 8 , it can be seen that increa sing dyna m ic power be y ond a certain poin t d oes not i m p rove noise figure . Simulation r esults sho w that the optimum point of oper ation corresponds to switch size o f 1 0µm. Figure 8 also suggests larger so u rce impedance impr oves noise performance. From [19], the noise figure can b e simplified to Eq. (4) and that minimizing switch resistanc e   and maximizin g source resistance   would opti mize noise p erforman ce. However,   is inversely proportional to transistor width, which varies with power consumption propo rtionally . Fro m po wer budgeti ng prospective, increasing   should be prioritize over r educing   .                (4) Since power consumption i n a digital circuit is proportional to its frequenc y and the b and of operation o f this recei ver is 400MHz, relativ ely low co m pared to the 2.4GHz band, a d ig ital mixer is ideal for this implementation. Although the NLO had 4 25% d u ty cycle, 2 of the phases (0 and 180) were chosen to use for the d own-conversion since OOK modulatio n does not utilize quadrat ure-phase to trans m it separate message. In addition, 25 % duty cycle clo ck was chosen, s ince it provi des better selectivity compared to two phases with 50% duty cycle. III. R ECE I VER ARCHITECTURE A ND S I M ULA TED PERF ORMANCE A. Complete Receiver With the system component’s po w er and operable frequency range closel y examined, it can b e easily concluded that i n ord er to avoid overhead b andwidth, o ptimal design should be implemented w ith p assive matching i nstead of active matching, and baseband amplificatio n should b e strictly control to only support up to the bandwidth of the allocated transmission band. For this front-end implementation, a mixer first architecture was adopted. The circular divider presented in [20] was used to construct the front-end. As mentioned, 2 path passive mixer was used instead of 4. Since passive mixer splits signal differentially, the LNA is d esigned into dif f ere ntial form as shown in Figure 9, while using t he sa m e b iasing conditio n as depicted in sectio n II A . For LN A operatio n band w id th lower than 1MHz, of f-transistors were used instead of feedback resistor as shown i n Figure 9 . The LN A outputs were load ed with 150fF capacitor to account for loading by latter sta g es of systems. Operating under OOK scheme with DDR tran smission signal input, the receiver is d esigned to be zero-IF, hence the LO frequency i s equal to the carrier frequency . The receiver f ront- end is shown i n the red dashed box in Figure 10 . T he system utilizes a 50 ohm off-chip resistor in the f ront end and uses off- chip matching network to perform step-up impedan ce transformation seen b y the mixer , im proving noise performance according to Eq. (4). While using h igh resis tan ce at the mixer switch’s input i n conjunction with step -down matching is theoretically equivale nt, large on -chip resistor are less desirable. The inductor   used was 18 0nH a nd   was 2pF, simulated along with the fr ont-end but envisioned to be implemented off - chip. Figure 7 : 2 dividers s t ru cture perfo rman ce compared. Circular divider of [16] showe d better powe r performance at 400 MHz Figure 8: Dynamic pow er of 4-path mixer vs noise figure achiev ed under 2 diff erent so urce impedance. This var iation s h ow s that to i m p ro ve mixer- first’s performance it is crucial t o transform source imped ance from 50 to larger values. Figure 9 : Differential Base band LNA employing resistive fee d back or LNA employing off-MOS feedback if bandwidth operat ion less than 1MHz. Outputs we r e loaded w i th 150fF capacitor to account for loading by latter stage s of syste ms OR                                   400 MHz The bandwidth of LN A is set to the spectrical occupancy of a desired data rate. For MedRadio compliant, id eally th e LNA would be limited to 300 kHz bandwidth. High data r ate mod e was also simulated as m o tivated in section I. B. Simulation Results The receiver front-end of Figure 10 was simulated with TSMC 65n m in SPECTRE. OOK signal s inputs were also fed as input to the front -end. To test the fu nctionality, channel select filter and 4 cascaded 10-dB gain ampli fiers were used , providing enough gai n to verify the de m o dulated data, but are not in the si m ulation scope of this paper. Po w er co ns umption and se ns itivity were estimated with P SS and P NOISE simulation tools. 8 bit-10bit coding was used such t hat majority of baseband infor m atio n’s energy is located at the Ny quist frequency. Noise figure was simulated a n d measured at this frequency. T h e theoretical sensitivit y then is estimated through equation (5 )        󰇛  󰇜       (5 ) The env isioned channel selectio n filter would pass only the desirable b andw idth hence  was taken as the band w idth of the channel where the data occupies , making the two equivalent . T he    term represen ts the signal to noise po w er ratio for a given BER under a modulation sche me. While modulation BER performance is g iven in     form, it can be converted to SNR power ratio as shown in (6)[ 21].           (6 )   is energy p er bit,   is noise spectral density and  is data rate. For the fro nt-end ai ming to utilize OOK, the data rate is the same as data occupied bas eband bandwidth with DDR . As shown in [22] and with Eq. 6 , OOK with BER of   requires about 13 dB SNR. Figure 11 shows t he possible deign point simulated for the mixer-first receiver front-end. T he theor etical sensitivities were esti m ated at different s ystem band width operation for optim al bandwidth utilizatio n. For current standard compliant receiver, the front -end is also adopted w ith L NA operated w ith 1M Hz bandwidth for optimal sensitivity. Motivated by the fact that in Figure 12 , sy stem Figure 10 : L ow Pow er F ront-end Syste m. Components i n the r ed dashed b o x is t he simulation sco pe of this paper. 50 o hm   matches to ante nna an d the step- up transfor mation seen fro m mixe r’s in p ut improves n oise perfo rmance and avo ids large o n - chip re sistor. 2 path m ixer w as used as OOK doesn’t utilize signal’s p hase to transm i t i nformation. C hannel sel ect filter and 4 cas cad ed 10 dB ga in amplifier w ere used to test the functional ity.         LO1 LO2     Down- Conversion Matching Network (off-chip) Baseband LNA 4-phase NLO CLK CLKP RESET OUT0 OUT90 OUT180 OUT270 LO Channel Select Filter Amplifier Demodulated Data Low -Power RF Front-End                           4 A mpl if ier Stag es Differential to Single Ended Converter                       Figure 11 : B a ndwidth vs Sensi tivity and Pow er required. Ide al sensitivity tendency on bandwidth and LNA power variati on is show n for comparison. BW and sensitivity optimal design are sh ow n separately as ann ot a ted . Standard compli ant perfo rmance show n in red d ashed box Figure 12 . Bandwidth vs Energy per Bits. Data rate reduction does not improve energy efficient infinitely as power is limited by LO s y n thesis. Phase gen. pow er e xhibits n o data rate dependency yet total p o wer is limited. Sensitivity Optimized Bandwidth Optimized Bandwidth Optimized Sensitivity Optimized Circular Divid er Used Channel select fil ter is used such that baseband bandwi dth equals data rate. 4 Cascaded 10 d B Amplifiers power ceases to reduce at 300kbps, but noise figure from L NA continues to d egrade . This tra nslates to - 70 dBm sensitivity as shown in the red dashed box in Fi gure 11 , consuming about 34 μW. The sensitivity for optimal bandwidth setting, LNA having 300 kHz bandwidth, were also shown in Figure 11 . In Table 1, the 1 0M bps results are compared w ith other literature reported in [23 ] , [24] , [2 5] . The energy efficie n cies w er e estimated under the desired d ata rate. In Figure 12 , one ca n obser ve that although decreasing bandwidth at cir cuit level re duces power, at syste m level, it does not translate to better energy e fficiency. T his is s how n with the power break-do w n of the system simultaneous ly . When tr ying to reduce power through b andwidth adj ustment, low bandwidth operation is eventuall y limited by the LO phase generation circuit ’s po w er hence the energy/bit does not improve after certai n operation data -rate. IV. C ONCLUSION Implantable healthcare monitoring call s for ultra-lo w active power (<50µW) high d ata-rate, energy-scalable, highly energy- efficient ( pJ/bit) rad ios. I n vestigation of power p erformance trade-off of each front-end component in a conventional rad io reveals 50Ω active matchin g and RF gain is p rohibitive for 50µW power-budge t. Receiver front-end d esigned with N-path mixer and baseband LNA in TSMC 65nm technology achieved sensitivity - 83 d Bm se n sitivity and <100 pJ/b for MedRadio compliant data rate and - 70 dB m sensiti v ity with <5p J/b at 10Mbps. Since L O synthesis po w er dominated the total power, future work would focus on energy/perfor m a nce scalable LO and high-impedance i nterf aces. V. A CKNOWL E DGEMENT The work is supported b y Sem ico nductor Research Cor poration (SRC) Grant No. 2720.001 and National Science Foundation (NSF) CRII Award, CNS Grant No. 1657455. VI. R EFERENCES [1] C. M. Lopez et al. , “An I m p l antable 455 -Active-Elec tr ode 52-Channel CMOS Ne ural Probe,” IEEE JSSC 2014 [2] “ Pill C am Caps ule Endoscop y - Given Imaging.” [Online]. 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Bryant et al., “ A 2.45GHz, 50uW wake -up rece iver front-e n d with -88d Bm sensitivity and 250kbps data rate,” in ESSC IR C 2014 TABLE I : FRONT END PERFORMANCE COMPARISON Symbol [20] [21] [14] [19] This wor k (Simulation) Receiver Purpose MICS Transceive r WuRx MICS Fr ont-end MICS Fr ont-end MedRadio Fr ont-end Architecture RF LNA Mixer-F irst RF LNA RF LNA Mixer-First Modulation OOK OOK - FSK OOK Supply V oltage 1.8 0.75 V 1V 1.8 V 1 V Frequency 400MHz 2.45 GHz 401- 457 MHz 402-405MHz 402-405MHz Power 3.4 mW 50 μW 370 μW 1.3mW 29.2 μW 34 μW BW/Data Rate 2Mbps 250kbps 650kbps 1Mbps 200kbps 300kbps* 10Mbps* Energy Efficien cy 1.71 nJ/b 200pJ/b 77pJ/b 370pJ/b 6.5nJ/b 97 pJ/b 3.4pJ/b Sensitivity (dBm) 10^ - 3 BER -80.2 - 88 - 71 -96(if we r e to use OOK) -96.8 - 83 # - 70 # Technolo gy 0.18 μ m 65nm 0.18 μ m 0.18 μ m 65 nm *OOK DD R signaling potentiall y supporting up to 30 0kbps data rate under 300 kHz ban dwidth limi tation, or 10Mbps under 10MHz bandw i dth, he re is used to estimate the sensitivity and energy efficient , # No imple mentation lo ss included and s hould be ad ded into desig n consideratio n Figure 13 . Pow er distribution amongs t key fro nt-end components. L O synthesis compo nents occupy t he ma jority of the power. 59% 15% 26% Power Consum ption Percentage NLO Phase Generation-A ND gates LNA NLO Phase Generation-Circula r Divider T otal Power: 34 μW Data Rate :10Mbps