Versatile Large-Area Custom-Feature van der Waals Epitaxy of Topological Insulators

Reading time: 5 minute
...

๐Ÿ“ Original Info

  • Title: Versatile Large-Area Custom-Feature van der Waals Epitaxy of Topological Insulators
  • ArXiv ID: 1707.04920
  • Date: 2017-07-27
  • Authors: Researchers from original ArXiv paper

๐Ÿ“ Abstract

As the focus of applied research in topological insulators (TI) evolves, the need to synthesize large-area TI films for practical device applications takes center stage. However, constructing scalable and adaptable processes for high-quality TI compounds remains a challenge. To this end, a versatile van der Waals epitaxy (vdWE) process for custom-feature Bismuth Telluro-Sulfide TI growth and fabrication is presented, achieved through selective-area fluorination and modification of surface free-energy on mica. The TI features grow epitaxially in large single-crystal trigonal domains, exhibiting armchair or zigzag crystalline edges highly oriented with the underlying mica lattice and only two preferred domain orientations mirrored at $180^\circ$. As-grown feature thickness dependence on lateral dimensions and denuded zones at boundaries are observed, as explained by a semi-empirical two-species surface migration model with robust estimates of growth parameters and elucidating the role of selective-area surface modification. Topological surface states contribute up to 60% of device conductance at room-temperature, indicating excellent electronic quality. High-yield microfabrication and the adaptable vdWE growth mechanism with readily alterable precursor and substrate combinations, lend the process versatility to realize crystalline TI synthesis in arbitrary shapes and arrays suitable for facile integration with processes ranging from rapid prototyping to scalable manufacturing.

๐Ÿ’ก Deep Analysis

Deep Dive into Versatile Large-Area Custom-Feature van der Waals Epitaxy of Topological Insulators.

As the focus of applied research in topological insulators (TI) evolves, the need to synthesize large-area TI films for practical device applications takes center stage. However, constructing scalable and adaptable processes for high-quality TI compounds remains a challenge. To this end, a versatile van der Waals epitaxy (vdWE) process for custom-feature Bismuth Telluro-Sulfide TI growth and fabrication is presented, achieved through selective-area fluorination and modification of surface free-energy on mica. The TI features grow epitaxially in large single-crystal trigonal domains, exhibiting armchair or zigzag crystalline edges highly oriented with the underlying mica lattice and only two preferred domain orientations mirrored at $180^\circ$. As-grown feature thickness dependence on lateral dimensions and denuded zones at boundaries are observed, as explained by a semi-empirical two-species surface migration model with robust estimates of growth parameters and elucidating the role of

๐Ÿ“„ Full Content

1 Versatile Large-Area Custom-Feature van der Waals Epitaxy of Topological Insulators Tanuj Trivedi,* Anupam Roy, Hema C. P. Movva, Emily S. Walker, Seth R. Bank, Dean P. Neikirk,* and Sanjay K. Banerjee* Microelectronics Research Center, Department of Electrical and Computer Engineering, The University of Texas at Austin, Austin, TX 78758 USA *Corresponding Authors: tanuj@utexas.edu, neikirk@mail.utexas.edu, banerjee@ece.utexas.edu Abstract As the focus of applied research in topological insulators (TI) evolves, the need to synthesize large-area TI films for practical device applications takes center stage. However, constructing scalable and adaptable processes for high-quality TI compounds remains a challenge. To this end, a versatile van der Waals epitaxy (vdWE) process for custom-feature Bismuth Telluro-Sulfide TI growth and fabrication is presented, achieved through selective-area fluorination and modification of surface free-energy on mica. The TI features grow epitaxially in large single-crystal trigonal domains, exhibiting armchair or zigzag crystalline edges highly oriented with the underlying mica lattice and only two preferred domain orientations mirrored at 180ยฐ. As-grown feature thickness dependence on lateral dimensions and denuded zones at boundaries are observed, as explained by a semi-empirical two-species surface migration model with robust estimates of growth parameters and elucidating the role of selective-area surface modification. Topological surface states contribute up to 60% of device conductance at room- temperature, indicating excellent electronic quality. High-yield microfabrication and the adaptable vdWE growth mechanism with readily alterable precursor and substrate combinations, lend the process versatility to realize crystalline TI synthesis in arbitrary shapes and arrays suitable for facile integration with processes ranging from rapid prototyping to scalable manufacturing. Introduction

The field of topological materials has burgeoned since the discovery of 2D and 3D topological insulators (TI),1,2 with several prototype initial demonstrations in the offing in spintronics,3โ€“5 next-generation electronics,6,7 on-chip optics and plasmonics,8,9 and several exotic promising phenomena under intense investigation such as Majorana quantum computing,10 axion electrodynamics and topological magnetoelectric effects.11,12 Since the early discovery and demonstration of the staple TI compounds,13โ€“17 the focus of research has evolved on several fronts. Demonstrations of scalable device applications remain challenging to this day, however, with a dearth of repeatable and adaptable thin film synthesis techniques being amongst the primary reasons.13,18 There are three well-established mechanisms to obtain high quality crystalline thin film TIs: bulk crystals and their exfoliation,14,19โ€“22 molecular beam epitaxy (MBE),16,23โ€“26 and physical vapor epitaxy,17,27โ€“30 also known as sub-atmospheric hot-wall van der Waals epitaxy (vdWE). The latter two are the only realistic contenders for scalable

2 implementation. While MBE offers high quality crystalline films with a fine control over film thickness, there are limiting factors such as complexity and cost of ultra-high vacuum systems, substrate choice, difficulty of ternary/quaternary compound growth and incompatibility with high vapor pressure compounds (e.g., sulfides).31 On the other hand, vdWE offers a low-cost, facile alternative, accommodating more source, substrate, and compound thin film combinations,32,33 but the control over film thickness and area remains challenging. An optimal balance must be achieved to explore alternatives addressing the challenges of scalability and reliability of TI synthesis for practical applications.

Selective-area growth (SAG) for compound semiconductors has received a great deal of attention owing to adaptability and ease of implementation.34โ€“36 SAG processes for TIs have only recently started attracting focus and the field is in its nascent stage, with proposed methods such as shadow-masked pattern and polymer imprint based local chemical modification with solvents or self-assembled molecules.37โ€“41 There is undoubtedly a need for fully integrable processes utilizing standard microfabrication technology to obtain large-area TI films, especially ternary and quaternary compounds, for electronic, spintronic and optoelectronic device applications. Such processes must be versatile enough to span the spectrum from academic and prototype research to scalable manufacturing. Simultaneously, unraveling the details of the growth mechanism is a necessary and significant advancement towards optimization and customization of TI SAG processes, and their extension to a larger set of compound and substrate combinations for future research and development.

As the natural next step towards technological relevance, a versatile process for large- area, cryst

…(Full text truncated)…

๐Ÿ“ธ Image Gallery

cover.png page_2.webp page_3.webp

Reference

This content is AI-processed based on ArXiv data.

Start searching

Enter keywords to search articles

โ†‘โ†“
โ†ต
ESC
โŒ˜K Shortcut