Global versus Local Weak-Indication Self-Timed Function Blocks - A Comparative Analysis
📝 Abstract
This paper analyzes the merits and demerits of global weak-indication self-timed function blocks versus local weak-indication self-timed function blocks, implemented using a delay-insensitive data code and adhering to 4-phase return-to-zero handshaking. A self-timed ripple carry adder is considered as an example function block for the analysis. The analysis shows that while global weak-indication could help in optimizing the power, latency and area parameters, local weak-indication facilitates the optimum performance in terms of realizing the data-dependent cycle time that is characteristic of a weak-indication self-timed design.
💡 Analysis
This paper analyzes the merits and demerits of global weak-indication self-timed function blocks versus local weak-indication self-timed function blocks, implemented using a delay-insensitive data code and adhering to 4-phase return-to-zero handshaking. A self-timed ripple carry adder is considered as an example function block for the analysis. The analysis shows that while global weak-indication could help in optimizing the power, latency and area parameters, local weak-indication facilitates the optimum performance in terms of realizing the data-dependent cycle time that is characteristic of a weak-indication self-timed design.
📄 Content
Global versus Local Weak-Indication Self-Timed Function Blocks
– A Comparative Analysis
P. BALASUBRAMANIAN*, N.E. MASTORAKIS§¶
- School of Computer Engineering Nanyang Technological University 50 Nanyang Avenue SINGAPORE 639798 Email: balasubramanian@ntu.edu.sg § Department of Computer Science Military Institutes of University Education Hellenic Naval Academy Piraeus 18539, GREECE Email: mastor@hna.gr ¶ Department of Industrial Engineering Technical University of Sofia Sofia 1000, Boulevard Kliment Ohridski 8 BULGARIA Email: mastor@tu-sofia.bg
Abstract: - This paper analyzes the merits and demerits of global weak-indication self-timed function blocks versus local weak-indication self-timed function blocks, implemented using a delay-insensitive data code and adhering to 4-phase return-to-zero handshaking. A self-timed ripple carry adder is considered as an example function block for the analysis. The analysis shows that while global weak-indication could help in optimizing the power, latency and area parameters, local weak-indication facilitates the optimum performance in terms of realizing the data-dependent cycle time that is characteristic of a weak-indication self-timed design.
Key-Words: - Self-timed design, Function block, Indication, Ripple carry adder, CMOS, Standard cells
1 Introduction
The
International
Technology
Roadmap
for
Semiconductors (ITRS) [1] has identified design for
reliability and resilience as one of the futuristic
grand challenges for design technology in its 2011
edition. The percentage of design reuse in system-
on-chip designs which was estimated to be 46% in
the 2009 ITRS edition is expected to become 96%
by the year 2024. Further, the proportion of design
blocks reuse with respect to glue logic is expected to
reach 60% in the year 2024. Moreover, parameter
uncertainty as a percentage effect on sign-off delay
is expected to increase from a current level of 18%
to 32% by 2024. In this backdrop, self-timed design,
which is a robust flavor of asynchronous design, is
acclaimed to be a strong contender or an inevitable
counterpart for digital circuit/system designs in the
nanoelectronics regime. This is because self-timed
designs are inherently modular (i.e. permits design
reuse) [2], are self-checking [3], exhibit superior
EMI compatibility [4], are noise-tolerant [5], have
the ability to cope with parametric uncertainty,
supply voltage, threshold voltage, and temperature
variations [6] [7], consume power only when and
where active [8], and are able to guarantee greater
security and robustness against hostile attacks
compared to synchronous designs in the case of
sensitive industrial applications [9] [10]. Taking
cognizance of these facts, the ITRS design report
has
projected
a
growing
requirement
for
asynchronous signaling in the nanoelectronics era
and also emphasizes the continuous development of
asynchronous circuit and system design tools over
the foreseeable future.
In this paper, we focus on analyzing the merits
and demerits of global weak-indication self-timed
function blocks versus local weak-indication self-
timed function blocks by building upon a prior work
[11], which reported that global weak-indication is
preferable compared to local weak-indication for
realizing a cascade of function blocks from power,
latency and area perspectives. Whilst confirming
Recent Advances in Circuits, Systems, Signal Processing and Communications
ISBN: 978-1-61804-366-5
86
that the observations reported in the previous work
[11] are correct, we additionally show that local
weak-indication is actually preferable from the point
of view of cycle time than global weak-indication.
In other words, we clarify that global weak-
indication could reduce the throughput aspect of a
weak-indication self-timed design, and with respect
to realizing the true timing advantage inherent in a
weak-indication self-timed design, the local weak-
indication design method is indeed preferable.
In the remainder of this paper, Section 2 presents
the fundamental concepts of self-timed design with
some illustrations. Section 3 briefly discusses the
local and global weak-indication self-timed system
architectures by considering a 32-bit ripple carry
adder (RCA) as an example function block. This is
followed by the simulation results obtained for two
local and global weak-indication self-timed 32-bit
RCAs. Subsequently, the theoretical evaluation of
cycle times for the two RCAs corresponding to local
and global weak-indication is presented. Finally, the
conclusions are derived in Section 4.
2 Preliminaries and Background
A self-timed (i.e. asynchronous) function block is
the combinational logic equivalent of a synchronous
digital system [12] [13]. Self-timed function blocks
represent a robust flavor of asynchronous function
blocks and are constructed using delay-inse
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