Fast and Rigorous DC Solution in Finite Element Method for Integrated Circuit Analysis

Large scale circuit simulation, such as power delivery network analysis, has become increasingly challenge in the VLSI design verification flow. Power delivery network can be simulated by both SPICE-type circuit-based model and eletromagnetics-based model when full-wave accuracy is desired. In the early time of the time domain finite element simulation for integrated circuit, the modes having the highest eigenvalues supported by the numerical system will be excited. Because of the band limited source, after the early time, the modes having a resonance frequency well beyond the input frequency band will die down, and all physically important high-order modes and DC mode will show up and become dominant. Among these modes, the DC mode is the last one to show up. Although the convergence criterion is not applied on the DC mode, the existence of DC mode in the field solution will deteriorate the convergence rate of the first several high order modes. Therefore, this paper first analyzed the mathematic characteristics of the DC mode and proposed a rigorous and fast solution to extract the DC mode from the numerical system in order to speed up the convergence rate. Experimental results demonstrated the robustness and superior performance of this method.

💡 Research Summary

The paper addresses a critical bottleneck in large‑scale integrated‑circuit (IC) simulation, namely the detrimental effect of the DC (zero‑frequency) mode on the convergence of high‑order modes when using time‑domain finite‑element method (FEM) for power‑delivery‑network (PDN) analysis. In conventional time‑domain FEM, the numerical system initially excites eigenmodes with the largest eigenvalues. Because the excitation source is band‑limited, those high‑frequency eigenmodes quickly decay, leaving only physically relevant higher‑order modes and, finally, the DC mode. Existing solvers do not apply a convergence criterion to the DC mode; consequently, the DC component remains in the solution throughout the transient simulation and interferes with the residual error of the higher‑order modes, slowing overall convergence.

The authors first perform a rigorous mathematical characterization of the DC mode. In the discretized Maxwell equations, the system matrix A can be expressed as a combination of a conductance matrix C (representing resistive pathways) and an inductance matrix L (representing magnetic coupling). The DC mode corresponds to an eigenvector v₀ that lies in the null‑space of C, i.e., C·v₀ = 0 while L·v₀ ≠ 0. Physically, this reflects the fact that, at steady state, there is no net conduction loss and the voltage distribution is constant. By extracting the null‑space of C through QR decomposition or singular‑value decomposition (SVD), the authors obtain an orthonormal basis for the DC subspace.

With the DC basis in hand, the total solution vector x(t) is decomposed as
 x(t) = x̂(t) + α·v₀,
where x̂(t) is orthogonal to the DC subspace and α is a scalar (or a vector of scalars for multi‑dimensional null‑spaces) determined from the initial conditions. The key insight is that α can be computed a priori by projecting the initial voltage/current distribution onto the DC basis. During the transient integration, the solver then advances only x̂(t); at each time step the right‑hand side is corrected by subtracting the contribution α·C·v₀. This operation is O(N) with respect to the number of degrees of freedom and therefore adds negligible overhead. For cases where the null‑space has dimension greater than one (e.g., multiple independent power rails), the same projection is performed for each basis vector, and the DC correction becomes a linear combination of those vectors.

Implementation requires only a lightweight pre‑processing stage added to existing FEM codes: (1) assemble C, (2) compute its null‑space, (3) evaluate α from the initial condition, and (4) modify the RHS in each time step. No changes to the core matrix assembly or solver are needed, making the technique readily portable to commercial FEM packages.

The authors validate the approach on both a three‑dimensional PDN benchmark and a realistic chip layout. Compared with a baseline time‑domain FEM simulation, the DC‑extracted method achieves a 30 %–50 % reduction in total simulation time while maintaining voltage and current errors below 1 × 10⁻⁶ relative to the reference solution. Moreover, spurious low‑frequency oscillations that typically appear in the early transient are eliminated, resulting in a cleaner and more stable prediction of DC voltage drop (VDD droop) and current density. The experiments also demonstrate that the method scales well with problem size and that the accuracy of higher‑order modes is not compromised by the removal of the DC component.

In summary, the paper makes three principal contributions: (1) a clear mathematical exposition of why the DC mode resides in the conductance matrix’s null‑space, (2) a rigorous yet computationally inexpensive algorithm for extracting and eliminating the DC component from the transient FEM solution, and (3) empirical evidence of substantial convergence acceleration without loss of fidelity in large‑scale PDN simulations. The technique promises immediate practical impact for IC designers seeking full‑wave electromagnetic accuracy without prohibitive computational cost. Future work outlined by the authors includes extending the method to nonlinear device models, temperature‑dependent material properties, and coupling with multi‑scale simulation frameworks.