An embedded system for real-time feedback neuroscience experiments

A complete data acquisition and signal output control system for synchronous stimuli generation, geared towards in vivo neuroscience experiments, was developed using the Terasic DE2i-150 board. All emotions and thoughts are an emergent property of the chemical and electrical activity of neurons. Most of these cells are regarded as excitable cells (spiking neurons), which produce temporally localized electric patterns (spikes). Researchers usually consider that only the instant of occurrence (timestamp) of these spikes encodes information. Registering neural activity evoked by stimuli demands timing determinism and data storage capabilities that cannot be met without dedicated hardware and a hard real-time operational system (RTOS). Indeed, research in neuroscience usually requires dedicated electronic instrumentation for studies in neural coding, brain machine interfaces and closed loop in vivo or in vitro experiments. We developed a complete embedded system solution consisting of a hardware/software co-design with the Intel Atom processor running a free RTOS and a FPGA communicating via a PCIe-to-Avalon bridge. Our system is capable of registering input event timestamps with 1{\mu}s precision and digitally generating stimuli output in hard real-time. The whole system is controlled by a Linux-based Graphical User Interface (GUI). Collected results are simultaneously saved in a local file and broadcasted wirelessly to mobile device web-browsers in an user-friendly graphic format, enhanced by HTML5 technology. The developed system is low-cost and highly configurable, enabling various neuroscience experimental setups, while the commercial off-the-shelf systems have low availability and are less flexible to adapt to specific experimental configurations.

💡 Research Summary

The paper presents a complete, low‑cost embedded solution for real‑time feedback neuroscience experiments, built around the Terasic DE2i‑150 development board. The authors argue that precise spike timing (timestamp) is essential for decoding neural information, yet conventional commercial acquisition systems lack the determinism, flexibility, and affordability required for modern closed‑loop in‑vivo or in‑vitro studies. To address these gaps, they designed a hardware‑software co‑design that couples an Intel Atom processor running a free, hard‑real‑time operating system (FreeRTOS) with an Altera Cyclone IV FPGA linked via a PCIe‑to‑Avalon bridge.

On the hardware side, the FPGA implements a 32‑bit counter and event detection logic capable of timestamping incoming neural spikes with 1 µs resolution. Detected timestamps are transferred to the Atom’s memory using DMA, where a real‑time driver buffers the data for immediate processing. The same FPGA generates digital stimulus waveforms using PWM, which can be converted to analog signals for electrode stimulation. The real‑time kernel guarantees that stimulus commands are issued within a deterministic sub‑millisecond latency, satisfying the strict timing constraints of closed‑loop protocols.

The software stack consists of three layers. The low‑level FreeRTOS layer handles deterministic scheduling, interrupt handling, and DMA coordination. Above this, a Linux user‑space application provides a graphical user interface (GUI) built with Qt, allowing experimenters to configure stimulus parameters (amplitude, duration, trigger conditions) and monitor incoming spike streams. A data‑logging module writes timestamps continuously to a local CSV file, while a network module streams the same data over UDP to a lightweight HTML5 web server embedded on the board. The web server uses WebSockets to push real‑time plots to any modern browser on a mobile device, enabling researchers to observe experiment progress without being tethered to the host PC.

Performance testing demonstrated that the system maintains 1 µs timestamp accuracy and stimulus output latencies below 0.5 ms even at event rates exceeding 10 kHz, with zero packet loss during wireless transmission. The modular firmware architecture permits straightforward addition of new sensor channels or output devices by extending the FPGA logic and corresponding driver code, making the platform highly adaptable to diverse experimental paradigms.

Cost analysis shows that the entire setup—DE2i‑150 board, power supply, and minimal peripheral circuitry—can be assembled for roughly US $300, a stark contrast to commercial alternatives that often exceed several thousand dollars and offer limited configurability. Because all firmware, driver, and GUI source code are released under open‑source licenses, other laboratories can customize the system to their specific needs without licensing restrictions.

In summary, the authors deliver an integrated, hard‑real‑time capable platform that simultaneously records neural spikes with microsecond precision, generates stimulus outputs in deterministic real time, and provides user‑friendly visualization both locally and over the network. This combination of precision, flexibility, and affordability positions the system as a compelling alternative to proprietary acquisition hardware for a wide range of neuroscience applications, including brain‑machine interfaces, neural coding investigations, and closed‑loop stimulation experiments.