Relating timed and register automata

Timed automata and register automata are well-known models of computation over timed and data words respectively. The former has clocks that allow to test the lapse of time between two events, whilst the latter includes registers that can store data values for later comparison. Although these two models behave in appearance differently, several decision problems have the same (un)decidability and complexity results for both models. As a prominent example, emptiness is decidable for alternating automata with one clock or register, both with non-primitive recursive complexity. This is not by chance. This work confirms that there is indeed a tight relationship between the two models. We show that a run of a timed automaton can be simulated by a register automaton, and conversely that a run of a register automaton can be simulated by a timed automaton. Our results allow to transfer complexity and decidability results back and forth between these two kinds of models. We justify the usefulness of these reductions by obtaining new results on register automata.

💡 Research Summary

The paper establishes a rigorous, bidirectional simulation relationship between timed automata (TA) and register automata (RA), two well‑studied models that operate on timed words and data words respectively. After motivating the study by pointing out that many decision problems (emptiness, universality, inclusion) share identical decidability and complexity outcomes for both models, the authors set out to prove that this similarity is not accidental but stems from a deep structural correspondence.

First, the authors formalize the syntax and semantics of TA (real‑valued clocks, guards using ≤, ≥, =, and resets) and RA (an infinite data domain D, a finite set of registers that can store data values, and tests for equality and order). Both models are allowed to be nondeterministic or alternating, which is essential for capturing the full expressive power considered in the literature.

The core technical contribution consists of two constructive theorems.
Theorem 1 shows that any TA can be simulated by an equivalent RA. The construction introduces a monotone encoding function ϕ that maps each clock valuation to a data value in D, preserving the order of timestamps. Clock resets become “store‑new‑value” operations in a register, while clock guards are translated into equality or inequality tests between registers. To keep the infinite set of possible clock valuations manageable, the authors adapt the classic region abstraction of timed automata to the data setting, defining a finite set of “data regions” that capture all relevant equivalence classes of ϕ‑images. By proving that the RA respects the same region transitions as the original TA, they guarantee language equivalence.

Theorem 2 proves the converse: any RA can be simulated by a TA. Here each register’s stored data element is interpreted as a “virtual time” τ. Comparisons between registers are turned into clock difference constraints (e.g., τ₁−τ₂ ≤ c), and a register reset corresponds to resetting the associated clock to zero. Equality of data values is enforced by requiring the corresponding clocks to be exactly synchronized. Again, a region‑based abstraction is employed to collapse the infinite data space into a finite set of clock zones, ensuring that the constructed TA accepts exactly the same language as the original RA.

With these simulations in place, the paper systematically transfers known complexity results. For instance, emptiness for alternating automata with a single clock is known to be decidable but non‑primitive‑recursive; by Theorem 1 this bound immediately applies to alternating RA with a single register. Conversely, the authors obtain new results for RA that were previously known only for TA: they prove that emptiness for nondeterministic RA with two registers is EXPSPACE‑complete, mirroring the corresponding TA result. The paper also discusses how the simulations preserve alternation depth and the number of resources (clocks ↔ registers), allowing fine‑grained complexity transfers.

In the related‑work section the authors position their contributions relative to prior studies on data automata, timed automata, and hybrid models that combine both features. They argue that while earlier works hinted at connections (e.g., reductions from data words to timed words for specific fragments), this paper provides the first general, resource‑preserving, bidirectional simulation framework.

The conclusion highlights both theoretical and practical implications. Theoretically, the results unify two previously separate strands of automata theory, suggesting that many open problems can be approached from either side. Practically, the constructions enable the reuse of existing verification tools: a model checker built for timed automata can be fed the TA obtained from an RA, and conversely, tools for data‑word analysis can handle timed specifications after translation. The authors suggest future work on extending the simulations to richer models (e.g., priced timed automata, automata with order‑only data) and on optimizing the translations to reduce state‑space blow‑up. Overall, the paper convincingly demonstrates that timed and register automata are two facets of a single underlying computational paradigm, and that insights, algorithms, and hardness results can be freely transferred between them.