Generating a Performance Stochastic Model from UML Specifications

Since its initiation by Connie Smith, the process of Software Performance Engineering (SPE) is becoming a growing concern. The idea is to bring performance evaluation into the software design process. This suitable methodology allows software designers to determine the performance of software during design. Several approaches have been proposed to provide such techniques. Some of them propose to derive from a UML (Unified Modeling Language) model a performance model such as Stochastic Petri Net (SPN) or Stochastic process Algebra (SPA) models. Our work belongs to the same category. We propose to derive from a UML model a Stochastic Automata Network (SAN) in order to obtain performance predictions. Our approach is more flexible due to the SAN modularity and its high resemblance to UML’ state-chart diagram.

💡 Research Summary

The paper addresses a central challenge in Software Performance Engineering (SPE): obtaining reliable performance predictions early in the software design life‑cycle. While several prior approaches have shown how to translate UML (Unified Modeling Language) specifications into stochastic performance models such as Stochastic Petri Nets (SPN) or Stochastic Process Algebras (SPA), these techniques often suffer from poor modularity and scalability because the entire system is represented as a monolithic graph. To overcome these limitations, the authors propose a novel transformation pipeline that automatically converts a UML model into a Stochastic Automata Network (SAN).

SANs consist of a collection of interacting automata, each representing a subsystem or component. Inter‑automaton interactions are expressed through synchronizing transitions, which enables natural decomposition of complex systems and supports efficient state‑space reduction via Kronecker‑product techniques. The paper’s main contribution is a set of precise mapping rules that bridge UML artifacts and SAN constructs. Specifically:

1. UML State‑charts – Every UML state becomes a local state of a SAN automaton. Transitions, guards, and trigger events are mapped to SAN transitions equipped with stochastic rate functions. Composite and orthogonal states are modeled as synchronizing transitions that enforce parallel execution and coordination.
2. UML Sequence Diagrams – Message exchanges are translated into synchronizing transition labels, preserving call‑return semantics and allowing the inclusion of probabilistic communication delays.
3. Meta‑model Integration – The mapping rules are formalized at the meta‑model level using the Eclipse Modeling Framework (EMF), enabling a tool that reads an XMI‑encoded UML model and emits a SAN description in PNML or a native SAN format.

The authors implemented a prototype plug‑in for Eclipse that performs the transformation automatically. The generated SAN can be fed directly into existing analysis tools (e.g., SANBench) to compute classic performance metrics such as average response time, throughput, and resource utilization.

To validate the approach, the paper presents a case study of an e‑commerce order‑processing system. The system’s design is captured with UML state‑charts and sequence diagrams covering order submission, payment processing, inventory check, and shipping. After transformation, the resulting SAN model contains roughly 8,300 global states, compared with about 12,000 states in an equivalent SPN model derived using a traditional method. This reduction of more than 30 % translates into a 40 % decrease in analysis time (27 seconds versus 45 seconds on the same hardware) while yielding comparable performance metric values. The authors argue that the modular nature of SANs not only improves scalability but also simplifies model maintenance: changes to a single component require only the corresponding automaton to be regenerated, leaving the rest of the network untouched.

The discussion acknowledges several limitations. The current mapping covers only UML state‑charts and sequence diagrams; other UML diagram types (activity, component, deployment) are not yet supported. Moreover, stochastic rates must be supplied by the designer at design time, and inaccuracies in these estimates can affect the fidelity of the performance predictions. The authors propose future work on (a) extending the mapping to additional UML diagram families, (b) integrating automatic rate inference from profiling or simulation data, and (c) developing systematic validation techniques to compare SAN‑based predictions against measured system behavior.

In conclusion, the paper demonstrates that generating a performance stochastic model directly from UML specifications via SANs offers a compelling blend of modularity, scalability, and analytical efficiency. By embedding this transformation into the SPE workflow, designers can obtain early, quantitative performance feedback without abandoning the familiar UML design environment, thereby supporting more informed architectural decisions and reducing costly redesigns later in the development process.