On the Applicability of Posts Lattice

For decision problems P defined over Boolean circuits from a restricted set of gates, we have that P(B) AC0 many-one reduces to P(B’) for all finite sets B and B’ of gates such that all gates from B can be computed by circuits over gates from B’. In this paper, we show that a weaker version of this statement holds for decision problems defined over Boolean formulae, namely that P(B) NC2 many-one reduces to P(B’ union {and,or}) and that P(B) NC2 many-one reduces to P(B’ union {false,true}), for all finite sets B and B’ of Boolean functions such that all f in B can be defined in B'.

💡 Research Summary

The paper investigates reduction relationships for decision problems defined on Boolean circuits and Boolean formulas when the underlying gate sets are restricted. Classical results in circuit complexity state that for any finite gate sets B and B′, if every gate in B can be computed by a circuit over B′ then the problem P(B) many‑one reduces to P(B′) within AC⁰ (constant‑depth, polynomial‑size circuits). This strong reduction, however, does not directly carry over to Boolean formulas because formulas are tree‑structured and do not allow gate reuse, which imposes different depth and size constraints.

To address this gap, the authors present two weakened reduction theorems that hold for Boolean formulas. The first theorem shows that if every function f in B can be expressed by a B′‑circuit, then P(B) NC² many‑one reduces to P(B′ ∪ {∧,∨}). NC² denotes problems solvable by circuits of polynomial size and depth O((log n)²). The construction proceeds by simulating each node of the formula with a B′‑subcircuit and, when necessary, inserting explicit AND/OR gates to preserve parallelism while keeping the overall depth within the NC² bound. The formula is decomposed into levels; each level is evaluated in parallel using the simulated subcircuits, yielding a final circuit whose size grows polynomially and whose depth is bounded by O((log n)²).

The second theorem replaces the added logical gates with only constant literals: P(B) NC² many‑one reduces to P(B′ ∪ {false, true}). Here the authors demonstrate that negation and other composite operations can be eliminated by substituting constant values and rearranging B′‑circuits, without increasing depth beyond the NC² threshold. They prove that any Boolean formula over B can be transformed into an equivalent B′‑circuit that uses only the constants false and true, preserving logical semantics while respecting the NC² depth and size limits.

Both results are “weak” in the sense that they do not achieve AC⁰‑level reductions; the additional parallelism required for formulas forces the reduction to reside in NC². This distinction highlights a fundamental complexity gap between circuits (which can reuse subcomputations) and formulas (which cannot). The paper argues that this gap clarifies the limits of formula‑to‑circuit transformations and has practical implications for hardware synthesis: while circuit‑level optimizations can often be performed within AC⁰, formula‑level optimizations must account for the need for logarithmic‑squared depth parallelism.

In the discussion, the authors outline several future research directions: extending the NC² reduction framework to broader classes of gate sets, designing parallel algorithms that exploit the tree structure of formulas more efficiently, and applying the constant‑only reduction technique to real VLSI design where only a minimal set of literals may be available. Overall, the work contributes a nuanced understanding of how restricted gate sets influence the reducibility of decision problems on Boolean formulas, bridging a gap between theoretical complexity classes and practical circuit design constraints.