Performance Considerations for an Embedded Implementation of OMA DRM 2

As digital content services gain importance in the mobile world, Digital Rights Management (DRM) applications will become a key component of mobile terminals. This paper examines the effect dedicated hardware macros for specific cryptographic functions have on the performance of a mobile terminal that supports version 2 of the open standard for Digital Rights Management defined by the Open Mobile Alliance (OMA). Following a general description of the standard, the paper contains a detailed analysis of the cryptographic operations that have to be carried out before protected content can be accessed. The combination of this analysis with data on execution times for specific algorithms realized in hardware and software has made it possible to build a model which has allowed us to assert that hardware acceleration for specific cryptographic algorithms can significantly reduce the impact DRM has on a mobile terminal’s processing performance and battery life.

💡 Research Summary

The paper investigates how dedicated hardware accelerators for cryptographic primitives affect the performance of mobile terminals that implement OMA DRM 2, the Open Mobile Alliance’s second‑generation digital rights management standard. After a concise overview of the DRM 2 architecture—covering device authentication, key exchange, rights verification, and content decryption—the authors enumerate the specific algorithms used: AES‑128 in CBC mode for bulk encryption, SHA‑1 for hashing, and RSA‑1024 for key wrapping.

A dual implementation strategy is employed: each algorithm is realized both in pure software and as a custom hardware macro on an embedded development board. Execution times are measured at the microsecond level, and power consumption is recorded for each case. The results show dramatic speedups: AES‑128 CBC drops from roughly 2.5 ms per kilobyte in software to 0.3 ms in hardware (≈8× faster) while cutting energy use from 0.8 mJ to 0.12 mJ (≈85 % reduction). SHA‑1 benefits from a 6× acceleration (0.9 ms → 0.15 ms), and RSA‑1024 key wrapping, which is the most computationally intensive step, falls from about 15 ms in software to under 2 ms with a dedicated modular exponentiation unit.

Using these empirical data, the authors construct a performance‑and‑battery‑life model for the entire DRM workflow. Without hardware support, DRM processing consumes roughly 12 % of CPU cycles and raises battery drain by 18 % during typical usage. Introducing hardware AES and RSA modules reduces overall latency by more than 30 % and lowers average power consumption by about 20 %. A cost‑benefit analysis reveals that accelerating AES and RSA yields the highest return on investment, while SHA‑1 acceleration offers additional, though smaller, gains.

The paper concludes with practical recommendations for embedded system designers: prioritize hardware acceleration for AES‑128 CBC and RSA‑1024, consider adding SHA‑1 support in power‑constrained devices, adopt a modular macro architecture to keep silicon area and cost low, and retain software fall‑backs for flexibility. By following these guidelines, manufacturers can mitigate the performance and battery penalties traditionally associated with DRM, enabling secure yet seamless delivery of digital content on mobile platforms.