Development of the analog ASIC for multi-channel readout X-ray CCD camera

We report on the performance of an analog application-specific integrated circuit (ASIC) developed aiming for the front-end electronics of the X-ray CCDcamera system onboard the next X-ray astronomical satellite, ASTRO-H. It has four identical channels that simultaneously process the CCD signals. Distinctive capability of analog-to-digital conversion enables us to construct a CCD camera body that outputs only digital signals. As the result of the front-end electronics test, it works properly with low input noise of =<30 uV at the pixel rate below 100 kHz. The power consumption is sufficiently low of about 150 mW/chip. The input signal range of 720 mV covers the effective energy range of the typical X-ray photon counting CCD (up to 20 keV). The integrated non-linearity is 0.2% that is similar as those of the conventional CCDs in orbit. We also performed a radiation tolerance test against the total ionizing dose (TID) effect and the single event effect. The irradiation test using 60Co and proton beam showed that the ASIC has the sufficient tolerance against TID up to 200 krad, which absolutely exceeds the expected amount of dose during the period of operating in a low-inclination low-earth orbit. The irradiation of Fe ions with the fluence of 5.2x10^8 Ion/cm2 resulted in no single event latchup (SEL), although there were some possible single event upsets. The threshold against SEL is higher than 1.68 MeV cm^2/mg, which is sufficiently high enough that the SEL event should not be one of major causes of instrument downtime in orbit.

💡 Research Summary

This paper presents the design, fabrication, and comprehensive testing of a novel analog application‑specific integrated circuit (ASIC) named MND02, intended for the front‑end electronics of the Soft X‑ray Imager (SXI) aboard the forthcoming Japanese X‑ray astronomy satellite ASTRO‑H. The ASIC integrates four identical signal‑processing channels, each comprising a preamplifier with programmable gain (0.6–10× in nine steps), a 5‑bit digital‑to‑analog converter (DAC) for offset adjustment, and two Δ‑Sigma modulators (odd and even) that perform oversampling and noise shaping. The modulators generate a 155‑bit stream per pixel, which is subsequently filtered by a decimation filter implemented in an FPGA to produce a 12‑bit digital value.

Key electrical performance metrics were obtained using pseudo‑CCD inputs. At pixel rates up to 100 kHz, the input‑equivalent noise is ≤30 µV, a level comparable to or better than conventional CCD readout electronics. Power consumption remains low, approximately 150 mW per chip at the same pixel rates, satisfying the stringent power budget of space‑borne instruments. Linearity tests across the full input range (±20 mV, corresponding to a 720 mV voltage swing) show an integrated non‑linearity (INL) of about 0.2 %, indicating excellent linear response. The programmable gain allows flexibility for different CCD operating conditions.

Radiation tolerance was evaluated through total ionizing dose (TID) and single‑event effect (SEE) experiments. Gamma irradiation with a 60Co source delivered a dose rate of 28.6 krad h⁻¹, accumulating up to 200 krad. During this exposure, the ASIC’s supply current increased by only ~10 % and gain degradation remained below 10 % even at the highest dose, with most changes attributable to the preamplifier stage rather than the Δ‑Sigma modulators. Post‑irradiation annealing recovered the parameters within two weeks, indicating no permanent damage.

For SEE testing, the device was exposed to a 400 MeV/amu Fe ion beam (LET = 1.68 MeV·cm² mg⁻¹) up to a fluence of 5.2 × 10⁸ ions cm⁻². No single‑event latch‑up (SEL) was observed, establishing an SEL threshold above 1.68 MeV·cm² mg⁻¹, well beyond the expected heavy‑ion environment in low‑inclination low‑Earth orbit (LEO). A few single‑event upsets (SEU) were recorded, but the design includes error‑detection and correction mechanisms that can mitigate their impact.

Compared with its predecessor MD01, MND02 demonstrates markedly improved TID tolerance, lower power consumption, and comparable or superior noise and linearity performance. The only systematic anomaly identified was a modest gain reduction in channel 0 across multiple chips, suggesting a layout‑related weak point that can be addressed in future revisions.

In summary, MND02 fulfills the demanding requirements for a space‑qualified CCD front‑end ASIC: low noise, low power, high linearity, and robust resistance to both cumulative ionizing radiation and single‑event phenomena. Its integration of analog amplification and high‑resolution Δ‑Sigma conversion enables a fully digital output from the CCD camera, simplifying the overall instrument architecture and enhancing reliability for long‑duration missions. Further work will involve extended thermal‑vacuum and radiation testing under realistic mission conditions, as well as software validation of the error‑correction schemes for SEU mitigation.