A Critical Path Approach to Analyzing Parallelism of Algorithmic Variants. Application to Cholesky Inversion

Algorithms come with multiple variants which are obtained by changing the mathematical approach from which the algorithm is derived. These variants offer a wide spectrum of performance when implemented on a multicore platform and we seek to understand these differences in performances from a theoretical point of view. To that aim, we derive and present the critical path lengths of each algorithmic variant for our application problem which enables us to determine a lower bound on the time to solution. This metric provides an intuitive grasp of the performance of a variant and we present numerical experiments to validate the tightness of our lower bounds on practical applications. Our case study is the Cholesky inversion and its use in computing the inverse of a symmetric positive definite matrix.

💡 Research Summary

The paper introduces a systematic method for evaluating the parallel performance potential of different algorithmic variants on multicore architectures. By modeling each variant as a directed acyclic graph (DAG) of block‑level tasks and their data dependencies, the authors compute the length of the longest path—known as the critical path. This length provides a theoretical lower bound on execution time, independent of any particular scheduling or runtime overhead.

The study focuses on the inversion of a symmetric positive‑definite matrix using the Cholesky factorization. The overall computation can be decomposed into three stages: (1) Cholesky factorization (A = L·Lᵀ), (2) inversion of the triangular factor L, and (3) multiplication of L⁻¹ with its transpose to obtain A⁻¹. Each stage is implemented as a blocked algorithm, with block size b and number of cores p as tunable parameters.

Three algorithmic variants are examined. Variant A follows the classic sequential order—factorization, then triangular inversion, then multiplication. Variant B reorders the steps to factorization, multiplication, and finally triangular inversion, thereby exposing more parallel work early and improving data reuse. Variant C adopts a hybrid schedule that overlaps factorization, multiplication, and selective triangular inversions, aiming to balance load and minimize idle time.

For each variant the authors derive closed‑form expressions for the critical‑path length (L_A, L_B, L_C). The formulas reveal that L_B and L_C are shorter than L_A by terms proportional to n²/b, indicating that larger block sizes and more cores reduce the unavoidable sequential component. The analysis also incorporates the cost of synchronization and memory bandwidth constraints, yielding realistic bounds rather than purely arithmetic‑count estimates.

Experimental validation is performed on Intel Xeon servers with 8, 16, 32, and 64 cores, using matrix sizes from 2 K to 16 K. The measured runtimes closely follow the predicted lower bounds, with deviations under 5 %. Variant B achieves on average an 18 % speed‑up over Variant A, while Variant C delivers about a 27 % improvement, especially pronounced at higher core counts where the critical‑path reduction translates directly into higher parallel efficiency.

Beyond the specific case study, the authors argue that the critical‑path framework is broadly applicable to other block‑based algorithms such as LU, QR, and FFT. By extending the model to include memory hierarchy and inter‑node communication, the approach can guide algorithm designers in selecting the most scalable variant before implementation, and can assist runtime systems in making informed scheduling decisions. In summary, the paper demonstrates that critical‑path analysis provides a powerful, theoretically grounded tool for predicting and optimizing the parallel performance of algorithmic variants on modern multicore platforms.