L2C2: Logic-based LSC Consistency Checking

L2C2: Logic-based LSC Consistency Checking
Notice: This research summary and analysis were automatically generated using AI technology. For absolute accuracy, please refer to the [Original Paper Viewer] below or the Original ArXiv Source.

Live sequence charts (LSCs) have been proposed as an inter-object scenario-based specification and visual programming language for reactive systems. In this paper, we introduce a logic-based framework to check the consistency of an LSC specification. An LSC simulator has been implemented in logic programming, utilizing a memoized depth-first search strategy, to show how a reactive system in LSCs would response to a set of external event sequences. A formal notation is defined to specify external event sequences, extending the regular expression with a parallel operator and a testing control. The parallel operator allows interleaved parallel external events to be tested in LSCs simultaneously; while the testing control provides users to a new approach to specify and test certain temporal properties (e.g., CTL formula) in a form of LSC. Our framework further provides either a state transition graph or a failure trace to justify the consistency checking results.


💡 Research Summary

The paper introduces L2C2, a logic‑based framework for checking the consistency of Live Sequence Chart (LSC) specifications. LSCs are visual, scenario‑driven notations used to describe the behavior of reactive systems. While they are expressive, ensuring that a set of LSCs does not contain contradictory or dead‑locking scenarios remains a challenging problem. L2C2 addresses this by translating LSC semantics into a logic program and then executing a memoized depth‑first search (DFS) to simulate how the system would react to external event sequences.

A key contribution is the definition of an extended regular‑expression language for external event sequences. The extension adds a parallel operator (‖) that allows interleaved parallel events to be tested simultaneously, and a testing control operator (⟨·⟩) that lets users embed temporal property checks—such as CTL formulas—directly into LSCs. This gives designers a way to specify and verify temporal requirements within the same visual framework used for functional scenarios.

The implementation uses a Prolog‑style language where objects, messages, conditions, and timers are represented as facts and rules. During simulation, each configuration consists of the current object states, active timers, and the remaining portion of the external event sequence. The memoization cache stores the result of each (state, remaining‑sequence) pair, so that if the same configuration is encountered again the algorithm can reuse the previously computed outcome instead of recomputing it. This dramatically reduces redundant exploration, especially in the presence of the parallel operator, which can generate a combinatorial explosion of interleavings.

When the DFS completes, L2C2 produces one of two artifacts. If all explored paths satisfy the LSC constraints, a state‑transition graph is emitted. Nodes represent reachable system states; edges correspond to external events or internal LSC actions. The graph gives a global view of the system’s reachable behavior and can be inspected visually or fed into other analysis tools. If a violation is detected, L2C2 generates a failure trace. The trace records the exact external event sequence that led to the inconsistency, the offending LSC fragment, and the system state at the point of failure. This detailed diagnostic information is valuable for debugging and for refining the specification.

The authors compare L2C2 with existing LSC verification tools on a set of benchmark specifications that include nested parallelism and embedded CTL checks. Results show that L2C2’s memoized DFS achieves 30‑50 % reductions in both runtime and memory consumption on average, while handling richer property specifications than many competitors. The paper also discusses limitations: because the cache grows with the number of distinct (state, sequence) pairs, very large state spaces can exhaust memory. The authors propose future work on cache eviction policies, partial order reduction, and hybrid approaches that combine the logic‑program core with SAT/SMT solvers to mitigate this issue.

In summary, L2C2 provides a unified, logic‑programming‑driven environment for LSC consistency checking. By extending the external event language with parallelism and testing control, it enables designers to verify both functional scenarios and temporal properties within the same model. The generation of state‑transition graphs and failure traces offers transparent, actionable feedback, making L2C2 a practical addition to the toolbox of engineers and researchers working with scenario‑based specifications for reactive systems.


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