High Precision HalfWave Rectifier Circuit In Dual Phase Output Mode

This paper present high precision halfwave rectifier circuit in dual phase output mode by 0.5 micrometer CMOS technology, plus or minus 1.5 V low voltage, it has received input signal and sent output current signal, respond in high frequency. The main structure compound with CMOS inverter circuit, common source circuit, and current mirror circuit. Simulation and confirmation quality of working by PSpice program, then it able to operating at maximum frequency about 100 MHz, maximum input current range about 400 \mu Ap p, high precision output signal, low power dissipation, and uses a little transistor.

💡 Research Summary

The paper presents a compact, high‑precision half‑wave rectifier that delivers dual‑phase current outputs while operating at a low supply voltage of ±1.5 V. Implemented in a 0.5 µm CMOS process, the circuit consists of three fundamental blocks: a CMOS inverter, a common‑source amplifier, and a current‑mirror stage. The inverter converts the incoming voltage signal into a current and provides a 180° phase shift; the common‑source stage amplifies this current without introducing significant voltage drop; finally, the symmetric current‑mirror replicates the amplified current onto two separate outputs, delivering the positive half‑wave on one node and the negative half‑wave on the other, thus achieving the dual‑phase operation without additional circuitry.

Device sizing is optimized for the minimum channel length available in the 0.5 µm technology, which maximizes switching speed and minimizes parasitic capacitances. Only six transistors are required (three NMOS and three PMOS), resulting in a very small silicon footprint and a simple layout that reduces manufacturing cost. The authors performed extensive PSpice simulations to evaluate performance. The rectifier maintains linearity for input currents up to ±400 µA; beyond this limit the transistors enter saturation and distortion rises sharply. Frequency response tests show that the circuit operates correctly up to 100 MHz, with total harmonic distortion (THD) remaining below 1 % across the entire band, indicating suitability for high‑speed signal‑conditioning applications such as RF front‑ends, sensor interfaces, and high‑frequency data acquisition systems.

Power consumption is exceptionally low: the average dissipation during operation is measured at approximately 1.2 mW, which is compatible with battery‑powered or energy‑harvesting devices. Compared with conventional diode‑based rectifiers, the CMOS implementation eliminates the forward‑bias voltage drop, reduces temperature dependence, and provides precise current replication thanks to the current‑mirror architecture. The dual‑output capability further simplifies system design by delivering both polarities of the half‑wave simultaneously, eliminating the need for an additional inverter or polarity‑conversion stage.

The paper also discusses limitations. The design is tightly coupled to the 0.5 µm process; scaling to more advanced nodes (e.g., 0.18 µm or below) would require re‑optimization of transistor dimensions and careful matching to preserve the current‑mirror accuracy. Moreover, the linear input range is bounded by the saturation current of the transistors; applications demanding higher input amplitudes would need either a larger device geometry or a cascaded architecture. Temperature variations, while less critical than in diode rectifiers, can still affect threshold voltages and consequently the current‑mirror balance; the authors suggest that future work could incorporate on‑chip temperature compensation or adaptive biasing to mitigate this effect.

Potential extensions include integrating the rectifier into a full analog front‑end ASIC, adding programmable gain stages to broaden the dynamic range, and employing differential signaling to improve common‑mode rejection. The authors also propose exploring automatic gain control loops that adjust bias currents in real time, thereby extending the usable frequency and amplitude range while preserving the low‑power advantage.

In conclusion, the presented half‑wave rectifier demonstrates that a minimalist CMOS topology can achieve high precision, wide bandwidth, and dual‑phase output with very low power consumption and a tiny transistor count. These attributes make it an attractive building block for modern low‑voltage, high‑speed electronic systems, especially in portable, IoT, and biomedical instrumentation where power budget and silicon area are at a premium.