High Q-factor CMOS-MEMS inductor

📝 Abstract

This study investigates a high Q-factor spiral inductor fabricated by the CMOS (complementary metal oxide semiconductor) process and a post-process. The spiral inductor is manufactured on silicon substrate using the 0.35 micrometers CMOS process. In order to reduce the substrate loss and enhance the Q-factor of the inductor, silicon substrate under the inductor is removed using a post-process. The post-process uses RIE (reactive ion etching) to etch the sacrificial layer of silicon dioxide, and then TMAH (tetra methyl ammonium hydroxide) is employed to remove the underlying silicon substrate and obtain the suspended spiral inductor. The advantage of the post process is compatible with the CMOS process. The Agilent 8510C network analyzer and a Cascade probe station are used to measure the performances of the spiral inductor. Experiments indicate that the spiral inductor has a Q-factor of 15 at 11 GHz, an inductance of 4 nH at 25.5 GHz and a self-resonance frequency of about 27 GHz.

💡 Analysis

This study investigates a high Q-factor spiral inductor fabricated by the CMOS (complementary metal oxide semiconductor) process and a post-process. The spiral inductor is manufactured on silicon substrate using the 0.35 micrometers CMOS process. In order to reduce the substrate loss and enhance the Q-factor of the inductor, silicon substrate under the inductor is removed using a post-process. The post-process uses RIE (reactive ion etching) to etch the sacrificial layer of silicon dioxide, and then TMAH (tetra methyl ammonium hydroxide) is employed to remove the underlying silicon substrate and obtain the suspended spiral inductor. The advantage of the post process is compatible with the CMOS process. The Agilent 8510C network analyzer and a Cascade probe station are used to measure the performances of the spiral inductor. Experiments indicate that the spiral inductor has a Q-factor of 15 at 11 GHz, an inductance of 4 nH at 25.5 GHz and a self-resonance frequency of about 27 GHz.

📄 Content

9-11 April 2008 ©EDA Publishing/DTIP 2008 -page- ISBN:
High Q-factor CMOS-MEMS inductor

Ching-Liang Dai, Jin-Yu Hong and Mao-Chen Liu
Department of Mechanical Engineering,
National Chung Hsing University,
Taichung, 402 Taiwan, R.O.C.

Abstract-This study investigates a high Q-factor spiral inductor fabricated by the CMOS (complementary metal oxide semiconductor) process and a post-process. The spiral inductor is manufactured on silicon substrate using the 0.35 µm CMOS process. In order to reduce the substrate loss and enhance the Q-factor of the inductor, silicon substrate under the inductor is removed using a post-process. The post-process uses RIE (reactive ion etching) to etch the sacrificial layer of silicon dioxide, and then TMAH (tetra methyl ammonium hydroxide) is employed to remove the underlying silicon substrate and obtain the suspended spiral inductor. The advantage of the post process is compatible with the CMOS process. The Agilent 8510C network analyzer and a Cascade probe station are used to measure the performances of the spiral inductor. Experiments indicate that the spiral inductor has a Q-factor of 15 at 11 GHz, an inductance of 4 nH at 25.5 GHz and a self-resonance frequency of about 27 GHz.
I.
INTRODUCTION Micro inductors that are important components can be applied in LC tank, VCO [1] and DC-DC converters [2]. The Q-factor is an important characteristic for inductors. The energy dissipation in inductors depends on the Q-factor of inductors. As the Q-factor of inductors increases, the energy dissipation in inductors decreases. Several studies have used MEMS (microelectromechanical system) technology to enhance the Q-factor of micro inductors. For instance, the electroplated solenoid-type inductors, presented by Nam et al. [3], were fabricated on both a standard silicon substrate and glass substrate by thick PR photolithography and copper electroplating. The maximum Q-factor of the inductors was about 10, and the inductance varied range from 1nH to 5nH. Tseng et al. [4] employed the post-CMOS process to fabricate micro inductors. The post-CMOS process adopted an anisotropic CF4/O2 RIE dry etching to remove the dielectric oxide layer, and then an isotropic SF6/O2 RIE dry etching was utilized to etch the underlying silicon substrate and release the suspended inductor. The maximum Q-factor of the inductors was 15, and the inductance was 1.88 nH at 8.5 GHz. Dai et al. [5] manufactured a micro suspended inductor using CMOS-MEMS process. The suspended inductor was released by a post-process after it completed the CMOS process. The post-process used etchants to etch the sacrificial layers of metal, and then TMAH was applied to remove the underlying silicon substrate and release the suspended inductor. The maximum Q-factor of the inductor was 4.7. An edge-suspended inductor, proposed by Chen et al. [6], was fabricated using a combination of deep dry etching and anisotropic wet etching techniques. The inductor had an inductance of 4.5-nH, a maximum Q-factor of 11.7 and a self-resonance frequency of 14.3 GHz. Fang et al. [7] developed a three-dimensional micro inductor with air-core using the surface micromachining and electroplating techniques. The maximum Q-factor of the inductor was 22.9 and the inductance was 1.17 nH at 5.5 GHz. Ahn et al. [8] used the surface micromachining technique to make a solenoid inductor with electroplated nickel-iron permalloy cores on silicon wafer. The Q-factor and inductance of the solenoid inductor were 1.5 at 1 MHz and 0.1 µH at 10 kHz, respectively.
The technique that utilizes the commercial CMOS process to fabricate MEMS devices is known as CMOS-MEMS [9-11]. The benefits of micro devices fabricated by the CMOS-MEMS technique are compatible with the CMOS process and easy mass-production. In this work, we employ the CMOS-MEMS technique to manufacture a spiral inductor. In order to enhance the Q-factor of the inductor, a post-process is adopted to remove silicon substrate under the inductor. The post-process utilizes CHF3/O2 RIE to etch the sacrificial layer of silicon dioxide, and then TMAH is used to remove the underlying silicon substrate. Experiments show that the suspended spiral inductor has a Q-factor of 15 at 11 GHz and an inductance of 4 nH at 25.5 GHz. II. DESIGH AND FABRICATION Figure 1 shows a planar spiral inductor, where D is the internal diameter of the spiral inductor, W is the wire width of the spiral inductor and S is the spacing between the wires of the spiral inductor. In this investigation, the planar spiral inductor is designed as D=136 µm, W=10 µm, S= 2 µm, and the number of turns is 3.5.

Fig. 1 Structure of the spiral inductor. 9-11 April 2008 ©EDA Publishing/DTIP 2008 -page- ISBN:
The Q-factor of the inductors, which measures the capability of the inductors to save energy, is an important parameter. According to t

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