Instruction sequences for the production of processes
Single-pass instruction sequences under execution are considered to produce behaviours to be controlled by some execution environment. Threads as considered in thread algebra model such behaviours: upon each action performed by a thread, a reply from its execution environment determines how the thread proceeds. Threads in turn can be looked upon as producing processes as considered in process algebra. We show that, by apposite choice of basic instructions, all processes that can only be in a finite number of states can be produced by single-pass instruction sequences.
💡 Research Summary
The paper investigates the expressive power of single‑pass instruction sequences—programs in which each instruction is executed at most once and then discarded—by connecting three formal frameworks: Program Algebra (PGA), Basic Thread Algebra (BTA), and process algebras such as ACP and CCS. Starting from PGA, the authors extend the primitive instruction set with multiple‑reply test instructions (++ n : a and ‑‑ n : a). While ordinary test instructions only distinguish a Boolean reply (T/F), the new instructions allow a basic instruction a to return any natural number from 1 to n, thereby enabling a single instruction to branch to up to n different successors. The semantics of these tests are defined precisely: a positive test proceeds to the i‑th next instruction when reply i (i ≤ n) is produced; a negative test proceeds to the (n‑i+1)-th next instruction. This extension, called PGA_mr, retains the original PGA operators (concatenation “;” and repetition “ω”) and axioms, ensuring that the algebraic reasoning infrastructure remains unchanged.
The second layer, Basic Thread Algebra, models the behaviour of a program under execution as a thread that performs basic actions sequentially, receiving a reply from its execution environment after each action. Traditional BTA only handles Boolean replies via the postconditional composition operator E_a. The authors enrich BTA with postconditional switching (BTA_pc), allowing replies from the set N⁺. This generalisation aligns BTA with the multiple‑reply tests of PGA_mr, establishing a tight correspondence between instruction sequences and threads.
To capture interaction with stateful services (counters, stacks, Turing tapes), a “use” operator is introduced. Service calls are expressed as instructions of the form f.m, where f is a focus (service name) and m a method (command). Execution of f.m triggers the service to process the command and return a natural‑number reply. Additionally, process‑construction instructions ac(e₁,…,e_n) are defined: they nondeterministically select one of the atomic actions e₁…e_n, perform it, and return the index of the chosen action. These constructs are crucial for representing all regular (finite‑state) processes.
The paper then bridges threads to processes using a process‑extraction mapping. By interpreting each basic action as an atomic action in a process algebra and each reply as a choice point, the authors show that the behaviour of a thread corresponds exactly to a process term in ACP/CCS. The central theorem states that every regular process—i.e., any process that can be described by a finite labelled transition system—can be generated by some single‑pass instruction sequence in PGA_mr, provided the basic instruction set includes the aforementioned process‑construction instructions. The proof proceeds by constructing, for any finite-state process, a set of guarded recursive equations over BTA_pc, translating them into a finite PGA_mr program, and then showing that the extracted process matches the original.
An important corollary is that the same expressive power can be achieved without multiple‑reply tests or postconditional switching if one assumes the “cluster fair abstraction” rule from process algebra, which effectively hides internal τ‑actions while preserving observable behaviour.
Finally, the authors demonstrate that the theoretical results are not merely abstract. They present a concrete assembly‑like instruction set (including load, store, jump, conditional jump) and show how, by encoding the multiple‑reply behaviour into combinations of these low‑level instructions and service calls, any regular process can be programmed in a language that closely resembles existing assembly languages. This illustrates the practical relevance of the formal findings for low‑level language design and compiler construction.
In conclusion, the work establishes single‑pass instruction sequences as a robust foundational notion in computer science, capable of representing the full class of finite‑state processes when enriched with multiple‑reply tests, postconditional switching, and service interaction. It opens avenues for further research on extending these techniques to non‑regular processes, richer service models, and optimisation of instruction sequences for real‑world architectures.
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