Considerations on the Design of Transceivers for Ambient Internet of Things

IEEE XXX, J ANU AR Y 2024 1 Considerations on the Design of T ranscei vers for Ambient Internet of Things Y uxiao Zhao*, Graduate Student Member , IEEE, Zhen Shen, Shiyu Li, Jing Feng, Student Member , IEEE and Hao Min*, Member , IEEE Abstract —The Ambient IoT (A-IoT) will intr oduce trillions of connections and enable low-cost battery-less devices. The A-IoT nodes can achieve low cost ( ∼ $0 . 1 like RFID tag), sub-1mW av erage power consumption, ≤ 10 kbps data rates, maintenance- free working for decades, cm-scale size, and support applications like supply chain and smart agriculture. The transceiver chal- lenges in A-IoT f ocus on sub-mW receivers and crystal-less clock generation. The paper proposes an approximate low-IF receiv er and carrier -auxiliary IF feedback LO synthesizer architectur e for T ype-B/C A-IoT devices, which tracks the RF carrier frequency and eliminates external crystals. The proposed receiv er and LO generator are implemented using 55nm CMOS technology . After locking the LO calibration loop, the receiver sensitivity is better than -88 dBm. The pr oposed receiver architecture will promote zero-po wer devices for ubiquitous IoT connectivity , bridging digital and physical worlds. Index T erms —Ambient Internet of Things, Massive Internet of Things, Backscatter Communication, 5G-Advanced, 6G, Receiver I . I N T RO D U C T I O N I N recent years, the number of Internet of Things (IoT) connections has exploded exponentially . According to IoT Analytics, by 2030, there will likely be more than 41 billion IoT connections [1]. In the future, trillions of nodes will enable massiv e IoT [2], which has already been discussed in massive machine-type communications (mMTC) of the fifth generation (5G) mobile communication [3], [4]. T raditional power supply solutions, such as wire-line power or batteries, are impractical for trillions of connections [5]. Meanwhile, a new IoT concept, Ambient IoT(A-IoT), is becoming popular [4], [5], [6], [7], [8], [9], [10], [11]. The A-IoT achie ves battery-free operation by introducing ambient energy harvesters to obtain energy from ambient sources, such as radio frequenc y , solar , thermal, vibration, pressure, etc. [9]. The A-IoT devices are also called “zero power” devices due to their capability to operate without a dedicated power source [12]. On the other hand, ambient communications utilizing backscatter modulation technology can establish long-term, maintenance-free, and ener gy-ef ficient networks due to the ultra-lo w power consumption charac- teristics [5]. The 3rd generation partnership project (3GPP) conducted a study in Release 18 to inv estigate ambient IoT use cases, deployment scenarios, and design targets, which will lead the Cellular A-IoT [13], [14]. Manuscript receiv ed January 10, 2024. Y uxiao Zhao, Zhen Shen, Shiyu Li, Jing Feng, and Hao Min are with Auto-ID Laboratory , Fudan Univ ersity , Shanghai 201203, China (e-mail: zhaoyx19@fudan.edu.cn, hmin@fudan.edu.cn). Considering the large proportion of the A-IoT nodes in the entire network, this paper summarizes the design targets of these nodes and discusses the network characteristics accord- ingly . • Low Cost : For IoT devices, the cost of radio frequency identification (RFID) tags is reaching $0 . 1 after decades of optimization [15]. In contrast, the cost of typical IoT devices such as Cellular , Bluetooth, and W iFi ranges from $10 to $100 . Therefore, the A-IoT aims to inherit the cost level of RFID T ags, making the scale of deployment close to the shipment volume of RFID, for example, 115 billion annually [16]. In addition, the low cost means that the nodes hav e low complexity and few off-chip components such as crystals and batteries, which helps to keep a small volume factor and long running time to av oid maintenance [17]. • Low Power : IoT technology has always been considered to be ef fectiv e in promoting supply chain tracking and optimization, helping to achiev e global carbon neutrality plans. The A-IoT is energy-ef ficient with ultra-low-po wer consumption (Sub-1mW) radio operation, which supports sub-10 µW average power consumption for decades of working life [9], [17], [18]. Based on the power con- sumption perspecti ve, A-IoT will be the lowest ener gy consumption (per node) IoT . • Low Data Rates : In the 3GPP IoT space [9], the A-IoT node is described as the very low-end IoT with a peak rate not exceeding 10 kbps [4]. The energy supply limits the data rate. And in the use case of A-IoT , such as supply chain management, precision agriculture, smart factories, etc., the common requirement is long-term maintenance- free, which giv es up the communication speed [13], [6]. In addition, the A-IoT nodes do not need to maintain continuous communication and will enable wak e-up op- eration and duty-cycle radio. In terms of size, the A- IoT is a supplement to the global IoT network and can be called the cornerstone of IoT because of the massiv e connections. The A-IoT will connect the digital world and the physical world, achieving the ultimate goal of the IoT , “Everything Connected” [19]. • Small V olume Factor : T o achiev e high-density deploy- ment, the A-IoT nodes need to hav e a small volume close to cm-scale, which will support large-scale sensing applications, such as underground sensing in precision agriculture[6]. 3GPP discusses about 30 agreed use cases for the A-IoT IEEE XXX, J ANU AR Y 2024 2 application. This paper summarizes the follo wing topics and makes key comparisons to better describe A-IoT’ s develop- ment trend. 1) Sensing : The A-IoT devices with sensors will construct a battery-free wireless sensor network [20], which can enable soil moisture monitoring, food, and vaccine qual- ity control, structural health monitoring, smart house, etc. In this case, A-IoT nodes will primarily operate in transmission mode, like intermittent-working energy- limited beacons. 2) Location : Low-cost, high-precision indoor ( ∼ 1 m ) and outdoor ( ∼ 10 m ) positioning based on the A-IoT nodes will support many new applications, such as mall nav- igation, indoor drone navig ation, tracking of products, tracking of the elderly , children, and tracking of liv estock, etc. [21]. 3) Supply Chain Management : Traditional RFID is de- signed for rapid inv entory and snapshot management in warehousing. Howe ver , A-IoT can track the assets and build a real-time online supply chain management system, which will optimize logistics and management costs [22]. 4) Actuator : W ith an actuator , the A-IoT devices can achiev e smart switches [23] that can control the equip- ment in the farmland in smart agriculture or update the status information of medical instruments in hospital instruments management [21]. Meanwhile, the A-IoT devices have been grouped into 3- type devices by the 3GPP RAN workgroup depending on the device complexity and power consumption level [13], [21]. Howe ver , the classification method proposed by 3GPP is designed for cellular A-IoT . The paper considers more open A-IoT issues and proposes the classification types of devices based on the po wer supply and communication activity . The proposed classification considers comprehensiv e ev aluations from multiple standard organizations such as Bluetooth[24], IEEE[25], and 3GPP [13], [14]. In addition, this paper also summarizes some chip design examples that meet the follow- ing categories. • T ype-A : Passi ve Device, similar to Device 1 defined by 3GPP [14]. Regarding po wer supply , the T ype-A A-IoT device is a pure battery-free device without any energy storage capability . The ultra-high frequency (UHF) RFID ISO18000-6C (EPC Gen2) tag is the classical T ype-A device. Ho wev er , the A-IoT node needs more functions based on the RFID tag, such as sensing with higher receiv er sensitivity and longer communication distance. In the communication type, the T ype-A device also ex ecutes passiv e communication, which is also called backscatter communication, without any independent sig- nal generation/amplification. Therefore, the type-A de vice has similar complexity compared with an EPC Gen2 tag, and some designs introduce a new radio frequency RF energy harvester to enhance tag communication distance for 5G applications[26]. In summary , the T ype-A device is similar to an RFID tag, which helps use mature RFID technology to design A-IoT . Howe ver , due to the backscatter communication, equiv alent to OOK or ASK modulation, the type-A de vices are not compatible with the popular IoT communication protocols (Bluetooth, W iFi, LoRa, NB-IoT , GSM, ...). The deplo yment of T ype- A devices requires modifying and upgrading the existing base stations, which means more deployment costs. • T ype-B : Semi-Passi ve Device, similar to Device 2a de- fined by 3GPP [14]. Re garding communication acti vity , the type-B de vices keep the backscatter transmitter , and the receiving path may be separated from the RF energy harvester . In addition, the T ype-B has no independent signal generation but is potentially backscattering with reflection gain. Compared with T ype-A, the T ype-B A- IoT devices hav e limited energy storage capability and do not need to be replaced or recharged manually . T ype- B devices can have a small battery with limited ca- pacity , but the po wer supply must last se veral decades. Chip design research for T ype-B devices has become popular in recent years. Some w orks introduce multiple antennas to design independent impedance matching for backscatter TX, receiv er , and energy harvester [27], [28]. Many works hav e achie ved good compatibility between backscatter communication and various communication protocols by the backscatter modulator , such as WiFi [29], [30], [27], [31], [32], [33], Bluetooth[34], [28], [31], [32], [35], Zigbee [31], Z-W av e [31]. Although the reflector amplifier is proposed to extend the backscatter communication distance by introducing reflection gain, some work only reports on-board designs [36], [37]. Cur- rently , there is no silicon implementation. In addition, to improv e the downlink communication distance and av oid the poor demodulation sensitivity brought by en velope detector and 1-bit quantizer in traditional RFID tags, the T ype-B devices can introduce lo w power wake-up receiv er technology[30], [27], [29], [28], [34], [35]. In summary , T ype-B device is designed to achieve compat- ibility between backscatter communication and popular short-range IoT protocols, and achiev e ambient energy harvesting and energy storage with high-efficienc y power management circuit. • T ype-C : Acti ve Dei vce, similar to De vice 2c defined by 3GPP [14]. The T ype-C tags are activ e radio devices without backscatter communication compared to T ype- A and T ype-B. The T ype-C devices hav e ambient energy harvesters and an optional small battery with a limited capacity . By introducing low-po wer radio technology and low-comple xity circuit design, the T ype-C device reduces ov er-design and only meets the loose wireless specifi- cation, which will reduce the cost of existing popular wireless IoT nodes[38], [39]. In addition, T ype-C de vices’ activ e radio power consumption during transmitting or receiving is less than 1 mW , which means less than 10 µW average power consumption at a common 1% duty cycle. The T ype-C devices meeting popular communi- cation protocols can achiev e node-node communication, which is rarely reported in T ype-B devices[35]. Based on the above discussion, this paper focuses on the design of transceivers in A-IoT , including the development IEEE XXX, J ANU AR Y 2024 3 of the physical layer , radio frequency specifications, and feasible transcei ver architectures. The paper proposes a crystal- less transceiv er architecture for T ype-B or T ype-C devices. The proposed transceiver discusses an ”approximate lo w-IF” receiv er architecture and a ”carrier-auxiliary IF feedback” LO frequency synthesizer for A-IoT applications. The rest of this paper is organized as follows. In Section II, the paper introduces the physical layer protocol in A-IoT , including the downlink/uplink physical channel in 3GPP and the radio frequency specification of A-IoT . Section III de- scribes the feasible transceiv er architectures and some critical transceiv er design considerations. Section IV introduces the proposed crystal-less transceiv er architecture for T ype-B or T ype-C de vices. Section V pro vides the detailed circuit designs of the “approximate low-IF” receiv er architecture and “carrier- auxiliary IF feedback” LO frequency synthesizer . In Section VI, this paper introduces the key simulation and measurement results of the proposed transcei ver and core circuits. Sections VII and VIII further discuss and conclude this paper . I I . E V O L U T I O N S O F P H Y S I C A L L A Y E R P RO TO C O L I N A M B I E N T I O T In the ne w A-IoT paradigm, defining physical layer pro- tocols is crucial for low-cost node design, including com- munication carrier frequency , modulation, data rate, encoding formats, etc. In the do wnlink, the po wer consumption budget of the A-IoT tag receiver is limited to 1 mW , which is insufficient to support complex modulation, such as PSK and QAM, especially for carrier frequencies above 1 GHz[40]. For the uplink, it’ s possible to achie ve low-po wer high-order modulation based on backscatter communication in the A- IoT device[30], [29], [32], [34], [33], [27], [35], [31]. The following paragraphs will provide a summary description of A-IoT physical layer designs based on the 3GPP works. A. Downlink: Reader to Device (R2D) Communication A-IoT’ s physical layer design goal is to build a simple, low complexity , and lo w power consumption network. 3GPP defines one physical channel for the R2D link, called the Physical Reader to De vice Channel (PRDCH). The channel transmits data and control information from the reader (base station) to the A-IoT device. The R2D link defines an OFDM- based OOK wav eform with a subcarrier spacing of 15 kHz. The line codes are Manchester and PIE encoding. 3GPP also defines a carrier frequency offset calibration signal in the R2D link that can be used to synchronize/calibrate the device clocks, such as the LO frequency . In addition, the carrier frequency of fset calibration signal will help to realize the “carrier-auxiliary IF feedback” LO frequency synthesizer proposed in this paper . B. Uplink: Device to Reader (D2R) Communication The D2R link also has one physical channel, the PDRCH, which carries data and control information. For D2R by backscattering, the external carrier wa ve provides the wa ve- form. The D2R baseband modulations can be set to OOK, P a r a m e t e r V a l ue Ope r a t i ng B a nd s 9 0 0 M H z , FR 1 l i c e n s e d s p e c t r u m i n FD D , N R b a n d n 8 C ha nn e l B a nd wi dth 1 8 0 k H z , 1 2 s u b c a r r i e r s S ub c a r r i e r S pa c i ng 1 5 k H z D a t a R a t e 0 . 1 k b p s , 1 k b p s , 1 s k b p s , 1 0 s k b p s B l oc k E r r or R a t e ( B LE R ) Ta r ge t 1 % , 1 0 % D own l i nk M od ul a t i on OOK U pl i nk M od ul a t i on OOK , B P S K , B FS K a n d M S K D e v i c e R e c e i v e r D e s i gn Ty p e - A : R F-E D ; Ty p e - B : R F-E D ; Ty p e - C : R F-E D , I F-E D , ZI F R X S e ns i t i v i t y - 3 0 d B m ( Ty p e - A ) , - 5 0 d B m ( Ty p e - B ) , - 7 0 d B m ( Ty p e - C ) Fig. 1. Ke y RF Performance Parameters of Ambient IoT Binary PSK, Binary FSK, as MSK (and not GMSK), and use single-sideband or double-sideband modulation according to the application environment. The line codes are Manchester encoding, FM0 encoding, Miller encoding, and no line coding. For channel coding of D2R, con volutional codes are preferred. C. Radio F r equency Specification The radio frequency specifications of A-IoT are summarized in Fig. 1 based on the 3GPP physical layer draft[14] and some papers[41], [42], [43]. According to the [44], A-IoT uses FR1 licensed spectrum in FDD. The NR band n8 can be used as an example band. The channel bandwidth for the A-IoT system is 180 kHz, and the frequency spacing of the subcarrier is 15 kHz. The target data rate of the A-IoT prototype currently ranges from 0.1 to se veral tens of kbps[14]. Therefore, the A- IoT is a narro wband Internet of Things. The bandwidth is close to NB-IoT , the data rate is close to LoRa, and the cost is close to RFID. Considering po wer consumption and performance, 3GPP has pro vided recommended recei ver architecture designs for different device types, including RF-ED (RF en velope detector), IF-ED (IF en velope detector), and ZIF (Zero-IF) receiv ers. As a supplement, low-IF (LIF) and uncertain-IF receiv er architectures are discussed in this paper . 3GPP has not yet giv en an exact v alue for the reference receiver sensiti vity lev el. This paper proposes three recommendation lev els of receiv er sensitivity . The receiver sensiti vity of T ype-A devices is slightly better than Gen2 tags, reaching -30 dBm. The receiv er sensitivity of T ype-C devices is close to the minimum sensitivity of activ e radio with similar coverage of A-IoT , such as -70 dBm of Bluetooth. The receiv er sensitivity of the T ype- B is between the T ype-A and T ype-C, defined at -50 dBm. I I I . L O W - P OW E R T R A N S C E I V E R D E S I G N C O N S I D E R A T I O N S F O R A M B I E N T I O T In this section, the paper will introduce the low-po wer transceiv er design considerations for A-IoT , including the recommended transcei ver architectures for A-IoT in 3GPP , the design considerations for sub-mW recei ver , and the ke y clock generation architecture. A. The Recommended T ransceiver Arc hitectur e in 3GPP 3GPP has defined v arious A-IoT de vice architectures for dif- ferent device types [14]. The T ype-A (De vice 1 in 3GPP) and T ype-B (De vice 2a in 3GPP) devices use an RF-ED receiv er architecture. In addition, the T ype-B may introduce LN A to IEEE XXX, J ANU AR Y 2024 4 Fig. 2. Zero-IF Receiv er Architecture for A-IoT T ype-C Devices improv e the noise figure and enhance the receiving sensitivity . The most important feature of T ype-B is the introduction of a reflector amplifier in the uplink backscatter path, which can significantly increase the communication distance between the device and the reader (base station). T ype-C devices ha ve various receiver architectures, including RF-ED, IF-ED, and ZIF . The IF-ED introduces a down-con v ersion stage before en velope detection, and the baseband also adds an N-bit ADC (N is a smaller integer), which helps to improve recei ver sensitivity compared with the RF-ED receiv er . 3GPP also rec- ommends ZIF receiv er architecture for T ype-C de vices (De vice 2b in 3GPP), which is an ener gy-hungry implementation[45], [46]. The detailed T ype-C device architecture based on the ZIF receiv er is shown in Fig. 2. B. The Design Considerations for Sub-mW Receiver Currently , there are many works on the transmitter design of the A-IoT devices[30], [29], [27], [28], [31], [34], [33], [35], [32], [38], [39]. Based on the above discussion, 3GPP has defined clear receiver architecture for T ype-A and T ype-B. This paper mainly discusses other possible recei ver architec- tures for T ype-C, which will supplement the implementation of A-IoT devices. T wo receiver architectures for low-po wer radio with higher sensitivity are mix er-first and LN A-first. Although the LN A- first receiver supports long-distance applications with -100 dBm receiv er sensitivity , the LNA requires a mW po wer budget. In addition, the excessi vely high sensitivity design in A-IoT devices may mean over -design. The mixer -first receiv er uses a mixer as the first stage, av oiding the active LNA. Although the mixer -first receiv er suffers from a higher noise figure (NF), which reduces the recei ver sensitivity , this archi- tecture can still achiev e considerable sensitivity and selectivity lev els under sub-mW power budgets[47], [48], [40]. In the sub-mW receiv er designs, the selection of the IF is crucial for the recei vers with a LO and a mixer . Since the OOK signal is its mirror, it does not cause demodulation issues. Therefore, the ZIF receiv er does not require an I/Q mixer , which can sav e the power of the LO buffer[49]. Howe ver , it is well kno wn that ZIF receiv ers are affected by flickering noise. In addition, although the A-IoT standard designed by 3GPP uses an OOK modulation wav eform, other standard or- ganizations also consider the FSK modulation wa veform [24]. Uncertain-IF is a popular sub-0.1 mW recei ver architecture, which uses a free-running oscillator and av oids the power consumption of the phase-locked loop. Howe ver , the wide- band IF path introduced to tolerate the poor frequency stability of the LO brings significant demodulation noise, resulting in a poor overall noise figure. The uncertain-IF architecture is in valid for IoT standards with multiple channel allocations due to the lack of PLL or FLL for channel switching [49]. The low-IF recei ver has always been a popular solution for low-po wer BLE recei vers, but it has an image rejection issue [50], [51]. The lo w-IF recei ver must use a front-end image rejection filter or an I/Q mixer at the expense of higher LO buf fer po wer [49]. C. The Low-Cost Low-P ower Clocks for A-IoT T ransceiver According to the 3GPP definition, the clock requirements in A-IoT devices include fiv e purposes [14]. Clock purpose #1 is the sampling clock used for baseband signal processing. Clock purposes #2 and #3 are, respectiv ely , small and large frequency offsets, which are used for backscatter modulation. Clock purpose #4 is a timing counting clock that controls device status. Clock purpose #5 is the local oscillator clock. Based on the frequency ranges, these clocks can be divided into 10s kHz, 1s-10s MHz, and 100s-1000s MHz clocks. The 10s kHz clock is generally provided by an external low-frequenc y crystal oscillator , such as the 32 kHz real- time clock (R TC) crystal commonly used in IoT devices. 3GPP also points out that an on-chip calibrated relaxation oscillator can generate a 10s kHz clock with a 1000-10000 ppm frequenc y accuracy[14]. In addition, the on-chip oscillator can also produce a 1s-10s MHz clock with relaxed precision requirements, such as 1000-10000 ppm. The LO clock is in the 100s 1000s MHz frequency range with 10s 200ppm clock accuracy requirement in 3GPP[14]. There are two popular LO generation solutions: FLL and PLL. The PLL achie ves phase tracking and introduces high- power components such as TDC in DPLL and CP in CP- PLL. The FLL is a simplified loop from PLL, operating in the frequency domain, and only achieves frequency tracking without phase noise suppression capability . In addition, there are two implementations for on-chip oscillators: ring and LC oscillators. LC oscillators have better phase noise performance with a large-area inductor . The area cost of the inductor is not significant for the SoC in type-C de vices. Howe ver , the LC oscillators are not applicable in type-A de vices because they cost similarly to the Gen2 tag. Some work uses wire-bonded or external inductors[40], which are in v alid in small-v olume, lo w- cost A-IoT devices operating in extreme en vironments. Ring oscillators hav e poor phase noise, and frequency stability is greatly af fected by PVT , but they ha ve higher area efficienc y . The phase noise of the LO has a significant impact on the sensitivity of the receiver . Still, it will not become a limiting factor for T ype-C de vices’ -70 dBm sensitivity tar get. The benefits of higher clock accurac y are obvious. Improv ed clock accuracy (with smaller uncertainty) allows smaller fre- quency guard bands, which impro ves spectrum efficienc y and reduces power consumption. 3GPP also gives an example[14]: IEEE XXX, J ANU AR Y 2024 5 V L O ,0 V L O,1 8 0 V L O, 9 0 V L O,2 7 0 G m G m G m G m OT A OT A OT A OT A PGA B PF PGA PGA B PF PGA I+ I - Q+ Q - D i g i tal B ase b an d D i g i tal B ase b an d Vb i as1 Vbi as2 Vbi as3 Vb i as4 D I V 2 D I V 2 V L O, 0 V L O,1 8 0 V L O, 9 0 V L O,2 7 0 L PF L PF R o t ati o n al PF D R o t ati o n al PF D Osci l l at o r I Q C L K C L K CP PL L PL L C L K 0 1 0 1 Matching Network Matching Network 32. 768kH z D A T A OU T Ambient IoT Receiver I mage R eje ctio n RF FE Dual - Mode Bandpas s IF Amplifier R el a xati o n OSC Fig. 3. Proposed A-IoT Receiver Architecture for T ype-B or T ype-C Devices Due to the influence of manufacturing processes and en viron- ments such as PVT , the initial carrier frequenc y offset (CFO) may reach 1000-10000 ppm, which will cause an offset of up to 900 kHz—9 MHz for the 900 MHz radio frequency carrier frequency . If the residual CFO after calibration can be reduced to 10s ppm, it means sev eral tens of kHz guard bands in the 900 MHz band. Because the typical D2R transmission bandwidth is 10s or 100s kHz, the 10s kHz guard band setting is acceptable. In contrast, a CFO of 100s ppm requires a guard band of 100s kHz, which is unacceptable in the spectrum efficienc y . Low-cost clock solutions also need to consider the number of external components, such as the crystal. Designing A-IoT devices without any crystals has become a key issue, which has also been mentioned in 3GPP[52]. Currently , the crystal- less radio solutions all obtain the reference frequenc y from the RF wireless signal and calibrate the on-chip oscillators. [53] defines 4 types of crystal-less receiver architectures, and the Class-AB architecture reduces the number of high-po wer modules operating at radio frequency with the lowest power consumption. The receiv er architecture proposed in this paper is improv ed based on the Class-AB crystal-less receiver . I V . P RO P O S E D A - I O T R E C E I V E R A R C H I T E C T U R E A. IF Ne gative F eedback Class-AB Crystal-less Receiver The proposed Class-AB crystal-less recei ver architecture is shown in Fig. 3. The frequency of IF is used as the negati ve feedback frequency signal in the frequency detector , f F B . The reference frequency f RE F is generated by a low- frequency frequency synthesizer , which uses a kHz on-chip relaxation oscillator with temperature compensation or an external 32kHz crystal oscillator (low-cost) as the original reference frequency , f X O . Therefore, the LO frequency syn- thesizer is a cascade frequency synthesis system. The reported temperature-compensated kHz on-chip relaxation oscillator has a frequency stability of ±1000ppm (±0.1 % )[54], [55]. The output frequency range of the low-frequency synthesizer is 0.5-1.5MHz, which can provide an IF frequency with ±0.1 % uncertainty (±1kHz for 1MHz IF). The RF front-end uses a 4-path passiv e mixer-first architecture to minimize power consumption as much as possible while providing interference rejection capability , which offers a good power and noise trade-off for low power recei ver design[56]. The proposed Class-AB crystal-less receiv er has 3 working steps. K VCO - f REF f OSC VCTRL L(s) - f RF f FB f IF Equivalent ModelIng: RF Oscillator => IF Oscillator K VCO f IF VCTRL CP FD VCO CP FD VC O I K K sC I K K H   ) s ( 0 0    ) C / ( p CP F D VC O I K K s Transfer Function & Zero-Pole 1/(sC) I CP K FD Fig. 4. Simplified s-domain Model of LO Frequency Calibration Loop (1) Step A: Uncertain-IF Mode. The frequency drift/error of the oscillator is due to the combined effect of process and temperature. After temperature compensation based on a coarse frequency lookup table (LUT), the LO frequency drift can be belo w ±500 ppm (0.45MHz to 0.9GHz), which can be achiev ed in MEMS[57] or LC oscillators[58]. For the ring oscillators, the frequency drift may be higher than ±1000ppm (0.9MHz to 0.9GHz) after simple temperature compensation[59]. In the Step-A stage, due to the LO fre- quency uncertainty , the receiver works in the uncertain-IF mode, which has a wide IF bandwidth to adapt to LO frequency variation. The wider IF bandwidth will negati vely affect the signal-to-noise ratio and reduce the recei ver sensi- tivity . (2) Step B: IF Feedback LO Calibration. After receiving the carrier with OOK modulation signal, the receiv er uses a frequency detector to compare the f F B with the f RE F , controls the charge pump (CP) to calibrate the LO, and then reduces the frequency difference between the carrier and the LO. Finally , the carrier frequency interlocks with the IF and LO frequencies. (3) Step C: Approximate Low-IF Mode. After obtaining the LO frequency with a smaller frequency deviation, the receiv er will enable a low-bandwidth IF path to improv e noise performance and sensiti vity . Because of no phase noise suppression capability , the LO frequency calibration loop makes the oscillator work in the free-running mode. Compared with the low-IF receiv er , the approximate low-IF receiv er has similar RF performance and worse near-carrier LO phase noise. B. Carrier-A uxiliary IF Ne gative F eedbac k LO F requency Calibration Loop The key technology in the crystal-less receiv er is the LO frequency calibration loop as shown in Fig. 4. The carrier-auxiliary IF negati ve feedback LO frequency calibra- tion loop consists of RFFE (4-path passi ve mixer and trans- conductance amplifier), IF blocks (analog baseband), Schmitt trigger (square wa ve shaping), rotational frequency detector (RFD), charge pump, loop filter, and voltage-controlled oscil- lator (VCO). The RFD is a normal module in the clock data recov ery application (RFD), achiev es IF frequency detection, and can endure long-term “0” or “1” in the OOK wav eform. Fig. 4 shows the simplified s-domain model, closed-loop transfer function, and poles of the calibration loop in the frequency domain. The RF-VCO frequency is down-con verted to the IF frequency , which can be equi v alent to an IF VCO[60]. IEEE XXX, J ANU AR Y 2024 6 Although the loop locks the LO frequency and IF frequency to the accurate carrier frequency , the carrier plays only an auxiliary role in the loop dynamics. In other words, the carrier with OOK modulation helps the frequency detector to operate at MHz IF frequency rather than GHz LO frequency through down-con version, avoiding higher power consumption in the LO feedback path. Therefore, this work introduces a carrier- auxiliary IF feedback calibration loop. In addition, there is no frequency con version in the IF path, which means L ( s ) = 1 . The transfer function shows that the loop is a first-order loop in the frequency domain, which means that there are no loop stability issues after setting appropriate loop parameters. C. Mixer-F ir st RFFE with Image Rejection and Out-of-Band Interfer ence Suppr ession This paper proposes a 4-path mixer -first RFFE with im- age rejection and out-of-band interference suppression. The passiv e mixer achie ves baseband impedance mapping, which can construct a high-Q radio frequency band-pass filter at the LO frequency , realizing a SA W -less receiver and reducing the A-IoT devices’ cost. The center frequency of the filter can be shifted based on the direction of the Gyrator , and the frequency variation can be tuned by the following formula: ∆ f = 2 G m C (1) Therefore, the center frequency of the equiv alent RF band- pass filter can be tuned by the size of trans-conductance (Gm) and capacitor (C), which will help achiev e image signal rejection. D. The T ar get IF Planning Based on the above discussion, the LO frequency drift after LUT temperature compensation is ±500 ppm (0.45 MHz to 0.9 GHz). Because the channel bandwidth (CBW) of A-IoT is 180 kHz, the 450 kHz uncertainty will cov er 2-3 channels. Therefore, the target IF frequency , f I F , should meet: f I F > 3 ∗ 180 k H z = 540 kH z (2) In addition, the image signal can be set in the av ailable frequency guard band (3GPP is discussing) by finding an appropriate IF , which will help simplify image interference designs. Like the BLE receiver design in [61], when only considering interference from other A-IoT de vices, the IF can be set: f I F = C B W 4 + C B W 2 ∗ n, n ∈ Z, n ≥ 0 = 585 , 675 , 765 , 855 , 945 , 1035 kH z , ... (3) Because too low IF frequency may introduce flick noise and DC offset issues like a zero-IF receiv er , this paper chooses 1035 kHz as the target IF frequency . V . C I R C U I T S D E S I G N F O R T H E P R OP O S E D R E C E I V E R A. 4-path P assive Mixer-F irst RF F r ont-end The proposed RF front-end circuit is shown in Fig. 5. The 4-path passi ve mixer and the Gyrator are combined to construct an RF band-pass filter with a tuning center frequency V L O, 0 V L O, 1 8 0 V L O, 9 0 V L O, 2 7 0 G m G m G m G m OT A OT A OT A OT A I mage R eje ctio n RF FE Gm Fig. 5. 4-path Passi ve Mixer -First RF Front-end M P1 M P3 M N2 M N3 VDD VDD M P2 M N1 V IN V O UT V Y VST Fig. 6. Schmitt T rigger with Programmable Threshold to achieve image rejection. The Gyrator is composed of trans- conductance amplifiers (Gm) and capacitors. The Gm adopts a common-source differential structure. By adjusting the bias current, the value of Gm can be changed, therefore, the adjustment of the center frequency can be realized. The TIA is the gain stage of the RFFE and uses the classical dif ferential common-source structure. The common-mode feedback is achiev ed by the two resistors in the output node. B. Carrier-A uxiliary IF F eedbac k Crystal-Less LO F r equency Synthesizer The carrier-auxiliary IF feedback crystal-less LO frequency synthesizer consists of a Schmit trigger , a rotating frequency detector (RFD), a charge pump, a low-pass filter (LPF), and an oscillator . As sho wn in Fig. 6, the designed Schmitt trigger achieves programmable threshold by tuning the digital- controlled MOSFET array and changing the equiv alent size. The RFD in Fig. 7 uses the reference clock to sample the I/Q data signal. Then, two AND gates generate pulses based on the 4 edges. If the I/Q data frequency is lower than the reference clock, a down pulse is generated at the DN node and vice v ersa. The charge pump in Fig. 8 adopts a source- switch structure, which has a faster switching speed and has a smaller dynamic mismatch. The on-chip LO is generated from the 2-stage ring VCO, which consists of two differential trans-conductance units and a cross-coupled RC network[62]. The VCO generates a 50% duty cycle I/Q differential local oscillator . IEEE XXX, J ANU AR Y 2024 7 D CK Q Q _ D F F D CK Q Q _ D F F D CK Q Q _ D F F D CK Q Q _ D F F D CK Q Q _ D F F D CK Q Q _ D F F D CK Q Q _ D F F D CK Q Q _ D F F A A _ A _ C _ C _ B _ B _ D _ D _ C B D A B B _ B _ C _ C _ D _ D _ A _ A _ C _ C _ D _ D _ I _D A T A Q_D A T A C K R EF UP DN Rota ti on al PFD CP VC T R L D CK Q Q _ D F F D CK Q Q _ D F F D CK Q Q _ D F F D CK Q Q _ D F F A A _ C _ B _ D _ C B D A B B _ C _ D _ A _ C _ D _ I _D A T A Q_D A T A C K R EF UP DN Rota ti on al PFD CP VC T R L Fig. 7. Rotating Frequency Detector V DD GND UP DN GND V DD M3 M4 M6 M7 M1 M2 M9 M 1 0 M5 M8 V CT RL IUP IDN IRE F L PF L PF B an d g ap B an d g ap Fig. 8. Source-Switch Charge Pump C. Ultra-low P ower Baseband The low-po wer analog baseband circuit used in this paper is sho wn in Fig. 9. The programmable gain amplifier (PGA) is implemented in two parts: the front PGA (PGA1) and the post PGA (PGA2) based on the connection with the filter . PGA1 provides proper gain to suppress the noise of the subsequent blocks and maintains noise performance. PGA2 can optimise linearity and provide a certain gain to avoid the degradation of the overall receiv er linearity due to excessi ve gain of the front- end blocks. Therefore, the baseband architecture can achiev e a good trade-off in terms of noise, linearity , and power . The PGA1 uses an in verter -based current-reuse amplifier structure for lo w-power , low-voltage design, reducing current consump- tion and achieving good noise performance. The PGA2 adopts a fully differential trans-conductance enhancement structure and uses local common-mode feedback to reduce power consumption. In addition, the filter circuit uses the gm-C architecture in Fig. 10. V I . M E A S U R E M E N T S A N D E X P E R I M E N TA L R E S U LT S As shown in Fig. 11, the prototype chip is designed and manufactured in the 55 nm CMOS process with a total area of 1 × 2 mm 2 . A. S11, F r equency Response and NF of RFFE As shown in Fig. 12, the S11 shows that the input impedance and the center frequency can be shifted based on the designed Gm-C Gyrator . In addition, changing the local oscillator frequency also changes the center frequency . V INP V INN V BIA S 0.8 V VD D M P1 M P2 M P3 M P4 M N1 M N2 M N3 V INP V INN V BIA S 0.8 V VD D M P1 M P2 M P3 M P4 M N1 M N2 M N3 V O UT P V O UT N V INP V INN V BIA S 0.8 V VD D M P1 M P2 M P3 M P4 M N1 M N2 M N3 V O UT P V O UT N M P3 R S R S 0.8 V VD D 0.8 V VD D V BIA S M P6 M P4 M P5 M P1 M P2 M N1 M N2 M N3 M N4 V INP V INN V O UT P V O UT N R L R L (a) PGA1 (b ) PG A2 V INP V INN V REF V REF PGA1 PGA2 BPF V O UT P V O UT N Analo g Baseband V INP V INN V REF V REF PGA1 PGA2 BPF V O UT P V O UT N Analo g Baseband Fig. 9. Ultra-low Power Baseband Architecture g m1 + + - - g m1 + + - - g m2 + + - - g m2 + + - - g m4 + + - - g m4 + + - - g m3 + + - - g m3 + + - - C A C B V INP V INN V O UT P V O UT N g m1 + + - - g m2 + + - - g m4 + + - - g m3 + + - - C A C B V INP V INN V O UT P V O UT N Fig. 10. gm-C Bandpass Filter in Baseband From the simulation results, the ratio of impedance at IF to the impedance at the image frequency shows an image rejection ratio of 16.7 dB. Based on the frequency response curve, the gain at the out-of-band frequency of 40 MHz is 17 dB lower than 4 MHz, which shows good out-of- band interference suppression. Fig. 12 also sho ws the noise figure with frequenc y . W ith the frequency increasing, the NF decreases due to the flick er noise. At the target 1.035 MHz IF , the NF is about 12 dB. B. LO F r equency Calibration Loop Dynamic Characteristics The time-domain characteristics of the LO frequency cali- bration loop are ev aluated by the behavioural-le vel simulation model. Fig. 13 sho ws the V C T RL and f I F curves, which indicate that the loop has typical first-order characteristics. Finally , the loop locks to the target IF with a settling time of about 12 µs , corresponding to approximately 12 reference cycles. In addition, the loop’ s operation e xhibits discrete-time features due to the RFD and CP . C. The Receiver Sensitivity Evolution The sensitivity of the whole receiv er can be estimated according to (4). Here, it is assumed that the margin is 6 dB, and the required SNR for R2D decoding is 10-15 dB. The ev aluation sho ws that the sensitivity will reach -88 dBm, demonstrating the high sensiti vity advantage of narro w-band communication. IEEE XXX, J ANU AR Y 2024 8 CPFLL RFFE ABB LO 2 mm 1 mm CPFLL RFFE ABB LO 2 mm 1 mm Fig. 11. The Photos of the Designed A-IoT Prototype Receiv er Chip S11 Pout NF Post - Simulation Fig. 12. S11, Frequency Response and NF of RFFE P S ensitivity = − 174 dB m/H z + 10 l og ( B W ) + S N R min + N F + M ar g in = − 174 dB m/H z + 10 l og (180 k H z ) + 15 dB + 12 dB + 6 dB < − 88 dB m (4) V I I . D I S C U S S I O N A N D F U T U R E A R C H I T E C T U R E Based on the above discussion, the current analog loop implementation is similar to CPPLL. According to the current trend of radio frequency digitization, the loop clocks can be digitally designed. This paper also shows two feasible digital calibration architectures, the SAR auxiliary LO calibration loop in Fig. 14 and the DFLL based on a low-po wer asyn- chronous counter in Fig. 13. V I I I . C O N C L U S I O N In conclusion, this paper has comprehensiv ely explored the transceiv er design, especially the receiv er design for A- IoT . The classification of A-IoT devices into T ype-A, T ype- B, and T ype-C based on power supply and communication activity provides a clear framework for device design. The proposed crystal-less transceiver architecture for T ype-B and 0.7 0.6 5 0.6 0.55 0.5 0 25us 50us V CT RL /V V CT RL =0.5V Loop Locked 2 1.5 1 0.5 0 25us 50us f IF /MHz f IF =1.035MHz Fig. 13. Simulation of Frequency Calibration Loop Dynamic Characteristics DBB Loop Fi lte r Or FS M(SA R) Counter - Base d FDC Counter - Base d FDC LC DCO FCW F INE o C FCW COA Matching Network 12 b it ADC 12 b it ADC ADC ADC ADC DEMOD DIV2 DIV2 4 Ph ase L O 32. 76 8 kHz SAR OUTPUT 10000 01000 01100 01010 01 01 1 SAR W o r kin g F lo w for 5 - Bits Ex am pl e DC O t SAR OUTPUT 10000 01000 01100 01010 01 01 1 SAR W o r kin g F lo w for 5 - Bits Ex am pl e DC O t As ync hron o us C ounter As ync hron o us C ounter Channel FCW CLK FSM(SAR) FSM(SAR) FCW Bang - Bang FD As ync hron o us C ounter Channel FCW CLK FSM(SAR) FCW Bang - Bang FD Class - A Receiv er with SAR LO Frequency Calibration Fig. 14. Class-A Receiv er with SAR LO Frequency Calibration DBB Low - Power PLL /F L L Ring DCO FCW F INE Matching Network 12b it ADC 12b it ADC ADC ADC ADC DEMOD DIV2 DIV2 4 Ph ase L O MHz o C FCW CO A As ync hron o us C ounter As ync hron o us C ounter + - Ch ann el FCW CLK Digi ta l L o op Filter (Accumulator) Digi ta l L o op Filter (Accumulator) FCW Digital FDC Loop F i l ter OUTPUT Start Point Ex a m pl e 1 - s t Order D i gi ta l Lo op Fi l te r t Loop F i l ter OUTPUT Start Point Ex a m pl e 1 - s t Order D i gi ta l Lo op Fi l te r t Class - A Receiver with Digital Frequency Locked Loop Fig. 15. Class-A Receiv er with Digital Frequency Locked Loop IEEE XXX, J ANU AR Y 2024 9 T ype-C devices, featuring an “approximate low-IF” recei ver and “carrier-auxiliary IF feedback” LO synthesizer , achie ves sub-mW receiv er and low-cost clock generation. Experimental results v alidate the proposed architecture, showing good per- formance in terms of noise figure and receiv er sensitivity . W ith the trend of radio frequency digitization, digital calibration architectures described in the paper of fer potential for further optimization. This paper not only adv ances the dev elopment of “zero power” A-IoT devices b ut also paves the way for more efficient and widespread IoT connecti vity , bridging the digital and physical worlds more seamlessly . A C K N O W L E D G M E N T Copyright ©2024 by [Y uxiao Zhao, Zheng Shen, Shiyu Li, et al.] All rights reserved. This document titled [Consider- ations on the Design of Transcei vers for Ambient Internet of Things] is published as an initial draft version subject to future updates and revisions as the research progresses without prior notice; no alterations amendments or substantial modifications to the Document shall be considered v alid unless explicitly approved in writing by all authors and any such changes made without unanimous written consent are strictly prohibited and deemed inv alid. The Document lists all authors who hav e made substantial contributions to the described work including conceptualization design analysis or writing with specific contributions as follows: Y uxiao Zhao is responsible for the design of the RX (Receiv er) architecture and associated circuit implementations, Zheng Shen contributed to the design of the RFFE (Radio Frequency Front-End) circuit components, Shiyu Li ov ersaw the design of the LO (Local Oscillator) circuit subsystem, and the remaining authors provided con- tributions to the writing editing and critical revie w supporting the finalization of the content. Users may cite reference or share the Document for non-commercial academic or research purposes provided it is clearly labelled as an ”initial draft version” (not a final published work) and all authors with their specific contributions are explicitly credited in deriv ativ e uses while commercial use distrib ution or adaptation without written consent from all authors is strictly prohibited. The date of the initial draft: June 15th, 2024. R E F E R E N C E S [1] M. Hasan, “State of IoT 2024: Number of connected IoT devices growing 13 % to 18.8 billion globally , ” (2024). [2] F . Guo, F . R. Y u, H. Zhang, X. Li, H. Ji, and V . C. Leung, “Enabling massiv e iot to ward 6g: A comprehensi ve survey , ” IEEE Internet of Things Journal , vol. 8, no. 15, pp. 11891–11915, 2021. [3] A. Hoglund, J. Bergman, X. Lin, O. Liberg, A. Ratilainen, H. S. Razaghi, T . Tirronen, and E. A. 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