Implementation of Chuas chaotic oscillator with an HP memristor

1 Implementation of Chua’ s chaotic oscillator with an HP memristor Muratkhan Abdirash, Irina Dolzhiko v a, Student Member , IEEE, Alex Pappachen James, Senior Member , IEEE, Electrical and Computer Engineering Department, Nazarbaye v Uni versity , Astana, Kazakhstan Abstract —This paper proposes an inno vativ e chaotic cir cuit based on Chua’ s oscillator . It combines traditional realization of a non-linear resistor in Chua’ s chaotic oscillator with a pr omising memristive circuitry . This mixed implementation connects old resear ch works that were focused on diodes with relatively new resear ch papers that are, now , concentrated on memristors. As a r esult, more reliable chaotic cir cuit with an HP memristor is obtained that could be used as a source of randomness. Dynamic behavior of the circuit is studied by obtaining fft analysis, different chaotic attractors and L yapunov exponent spectrum. The results show that the addition of a memristor enhances chaotic beha vior of the circuit while maintaining the same power dissipation. Index T erms —HP memristor , Chua’ s chaotic circuit, chaotic attractor , non-linear resistor . I . I N T RO D U C T I O N Memristor as a concept was introduced in 1971 by Leon Chua. He entitled memristor as ”the missing fourth element”, considering it as one of the basic circuit components along with a resistor , capacitor and an inductor . It was stated that a memristor would link charge with flux, completing the sym- metrical dependence between the four fundamental variables of any electrical circuit: current, voltage, charge and flux [1]. Howe v er , the existence of a memristor was questionable up until 2008. Only at that time, laboratories at Hewlett- Packard (HP) were finally able to experimentally demonstrate a working memristor [2]. After this discov ery , memristors have become one of the most hea vily researched topics across the world. This is, mainly , because a memristor has two main characteristics that make it extremely attracti v e for scholars. First, its ability to function as a memory de vice, which potentially can re v olution- ize IC industry [3], [4], [5], [6]. Second, its ability to function as a non-linear memristor . This property would be the main focus of the paper - utilizing memristor’ s non-linear behavior to create chaotic circuits. Chaotic circuits containing memristors are not something new; there ha ve already been plenty of research on this topic. For example, in source [7] a memristor, modeled with quadratic I-V characteristics, was used in building Chua’ s chaotic circuit. A very simple chaotic oscillator was proposed in [8], in which a memristor was implemented as an activ e device connected in series to just an inductor and a capacitor . While in another source [9], memristor with a cubic I-V dependence model was used as a non-linear element for Chua’ s circuit. As it can be seen, se veral attempts have been made in creating a chaotic circuit with a memristor . One common thing among all these papers is that a memristor was integrated to, specifically , Chua’ s chaotic circuit in one way or another . This is, because, firstly , Chua’ s circuit is very simple and, secondly , it contains a mandatory non-linear element which is what, essentially , memristor is [10]. What sets apart this paper from others is that it proposes a circuit that combines two currently most popular non- linear elements, namely an HP memristor and a diode. This combination is special due to two reasons. Firstly , it makes use of two diodes in antiparallel, which ha ve been proven many times as the most traditional and reliable realization of a non- linear element in Chua’ s circuit [10]. Secondly , it contains an HP memristor, which is, now , recognized as one of the ne west realizations of a non-linear resistor . Moreov er , inte grating, specifically , an HP memristor , being the first e ver physically realizable memristor , adds one more layer to reliability and feasibility of the circuit. It is further strengthened by using a realistic mathematical model of an HP memristor as suggested in source [11]. The proposed circuit exhibits chaotic behavior , whose output signal can then be used to generate random number sequences. The remainder of this paper is or ganized in the following way . Section II provides theoretical background about the HP memristor and Chua’ s chaotic circuit. The methodology is giv en in Section III. Section IV demonstrates the results. This is followed by discussion in Section V . Finally , Section VI concludes the paper . I I . B A C K G RO U N D A. HP Memristor An HP memristor is a thin film made of T iO 2 . It is doped with oxygen vacancies and bounded between two platinum plates that act as metal contacts. Its internal structure can be viewed from Fig. 1 as described in [12]. Here, D is a length of the whole memristor and w is a length of the doped region. Figure 1. Internal Structure of an HP Memristor Resistances of the doped and undoped re gions are known as Ron and Roff , respectiv ely . From this it follows that a 2 memristor can be modeled as a series connection of two different resistances. The only complication here is that a length of the doped region changes depending on the amount and direction of the current passing through a memristor . Intuitiv ely , when a positi ve current keeps on flowing through a de vice, the doped re gion e xpands and, the total resistance decreases. It is the opposite with a negati ve current resulting in the increase of a total resistance [11]. Mathematical equations describing the behavior of an HP memristor , as taken from source [11] are presented below . First, I-V equation of an HP memristor is given by Eq. 1, where w ( t ) is a width function of memristor’ s doped re gion. v ( t ) = ( R on w ( t ) D + R of f (1 − w ( t ) D )) i ( t ) (1) Secondly , w(t) can range from 0 (when the total resistance is R of f ) to D (when the total resistance is R on and is related to current through Eq. 2, where η is a polarity and µ v is a mobility of dopants. w 0 ( t ) = η µ v R on D i ( t ) (2) Howe ver , it was discovered that Eq. 1 and Eq. 2 cannot fully describe the operation of an HP memristor . It happens, because a high degree of non-linearity is observed in boundary condi- tions ( w → 0 and w → D ), which are far more complicated than Eq. 1 and Eq. 2 [11]. For more comprehensi ve description of the model, window functions were introduced. In this paper , Biolek window is utilized since it performs better than Joglekar , but is not as complicated as other window functions [11]. Modified Eq. 2 with window function is represented by Eq. 3, where Biolek window is defined by Eq. 4. In Eq. 4 stp ( i ) = 1 for i > = 0 , and stp ( i ) = 0 for i < 0 . w 0 ( t ) = η µ v R on D i ( t ) F ( w ( t ) D ) i ( t ) , (3) F B ( x, i, p ) = 1 − ( x − stp ( − i )) 2 p , (4) B. Chua’ s Chaotic Circuit Chuas oscillator is the simplest circuit that can generate chaos [10]. It is demonstrated on Fig. 2 and, it is, indeed, very simple comprising of only fi ve elements in total: two capacitors, one inductor, one resistor and a non-linear activ e resistor . Y et it is considered as a very powerful circuit that defines and sets chaotic requirements for all the other complex circuits Figure 2. Schematics of Chua’s chaotic oscillator out there. Moreover , Chuas circuit is autonomous, meaning that it produces a time-varying output without a time-varying input [10]. Having all these characteristics it establishes nec- essary conditions for a certain circuit to exhibit chaos it should hav e, at least 3 storage elements, one acti ve local resistor and a non-linear resistor . Output of any circuit based on Chua’ s oscillator should satisfy two conditions to be recognized as chaotic [10]: 1) Circuit variables (current and voltage) as measured from any node of the circuit should be chaotic and random. In other words, time plots of variables should look like a noisy signal. 2) Chaotic attractors (plot of v oltage across one capacitor versus voltage across another) should be shaped as a double scroll or come close to it. I I I . M E T H O D O L O G Y A. Analysis of traditional design of Chua’s cir cuit A lot of sources refer to diode implementation of Chua’ s circuit as the most popular one. For this reason, inv estigating how that circuit operates would be a good starting point tow ard the final design. It was, indeed, beneficial since the proposed circuit is, essentially , based on that classical model with diodes. Simulation files of Chua’ s circuit with diodes on L Tspice were av ailable on this open source [13]. The most important component in traditional Chua’ s circuit is a non-linear resistor implemented as two antiparallel diodes. This is because, ideally , memristor should be able to either replace or enhance those diodes and produce equally , if not more, random signal. T o find out how exactly those diodes contribute to the overall chaotic behavior , DC sweep analysis on L Tspice was performed. The circuit for DC sweep can be found in the appendix. After running the test circuit, I-V curv e of the diodes was obtained (Fig. 3). It perfectly matches what is described in many sources including [10], which call this type of non- linear IV relationship as piece wise linear . The two branches with positive slope on the right and left can be ignored right Figure 3. I-V curve of the diodes 3 now for the purpose of the analysis. The middle part of the curve in Fig. 3 comprises of three line segments with different neg ativ e slopes. The negati ve slopes are coming from a neg ati ve impedance op amp attached in parallel to the diodes, so that in combination they function as one locally activ e non-linear resistor . This I-V curve demonstrates a very simple way to achieve a non-linear relationship, just by changing the slopes of a straight line. Obviously , there are other ways to achiev e that - quadratic, cubic, etc. There is one more condition to obtain chaos - specific v alues of R, L and C parameters in the circuit. Slight changes in the values of these parameters may cause chaotic circuit to behave as a periodic oscillator [10]. B. Inte grating an HP memristor to Chua’ s chaotic oscillator L Tspice model for an HP memristor with Biolek window was downloaded from [ ? ]. The first attempt at including a memristor to the circuit was by replacing one of the diodes in antiparallel. After removing the diode, adding an HP memristor and choosing appropriate v alues for R, L and C parameters, simulation was run. Howe ver , the output chaotic signal was decaying too fast compared to the original circuit. In other words, it produced a transient chaotic signal for a relativ ely short period of time. That is why , it was decided to keep the both diodes. Finally , the proposed circuit’ s schematic can be vie wed in Fig. 4. There are three components that make the non-linear resistor for Chua’ s chaotic oscillator in the final design of the circuit: two diodes in antiparallel connected to an HP memristor in parallel. T o confirm that the proposed circuit functions as desired, i.e. produces chaotic signals, se veral analysis were performed. First of all, the output random signal of the new circuit is shown in Fig. 5 for 90 ms of the simulation, performed using a transient analysis in L Tspice. The signal is taken as the v oltage across capacitor C 2 . V isually , it is reassuring that V out is, indeed, random, since it behaves like a very noisy signal with no pattern whatsoever . Secondly , IV curve of these complex non-linear elements was obtained using DC sweep analysis in L Tspice. The result is shown in Fig. 6 and, it can be seen that an IV curve is, in fact, non-linear having different slopes and ev en greater number of slopes than the original circuit. This indicates how the addition of the memristor has enhanced the overall non- linearity of the circuit. Thirdly , to pro ve the output signal’ s randomness or noisi- ness, FFT analysis was done. The results are presented in Fig. 7. As expected, there are a lot of frequency components with different amplitudes, which is exactly what is required from a random signal. The next checking point was to plot the chaotic attractor of the system. As it was mentioned earlier , chaotic system should hav e an attractor shaped like a double scroll. Chaotic attractor is plotted as one circuit variable against another . In this case, voltage across capacitor C 2 was plotted against the current in the inductor L 1 . It is shown in Fig. 8 and, it is shaped as a double scroll and satisfies the condition for chaotic system. Figure 4. Schematic of the proposed circuit Figure 5. Random V out of the circuit Figure 6. I-V curve of a non-linear resistor implemented with an HP memristor and a diode Lastly , to make sure, that randomness is coming from both diodes and memristor , the currents in each component are shown in Fig. 9. It is clear , that each component is equally contributing to the randomness. 4 Figure 7. FFT of the output signal Figure 8. Chaotic attractor of I vs. V Figure 9. Currents in D2, D1 and memristor I V . R E S U LT S A. Derivation of differ ential equations governing the circuit T o study the dynamics of Chua’ s circuit, one must deriv e the differential equations gov erning the behavior of that circuit. Here, dynamics means the response of the circuit under changing parameter values. Obviously , parameters refer to R, L and C v alues integrated to the circuit. The process of deriving those equations is described in source [10] and all the proceeding equations are based on that. 1) I-V Mathematical Relationship: I-V curve of the non- linear element of the proposed circuit is presented in Fig. 6. As it can be seen, there are four regions with different negati ve slopes in the I-V graph. 2) Slope 1: Point 2: (-6.1799 V , 3.2334 mA); Point 1: (-1.2700 V , 0.9300 mA); A = (3 . 2334 − 0 . 9300) ∗ 10 − 3 − 6 . 1793 + 1 . 2700 = − 0 . 4691 mS 3) Slope 2: Point 2: (-1.2700 V , 0.9300 mA); Point 1: (0 V , 0 mA); B = (0 . 9300 − 0) ∗ 10 − 3 − 1 . 2700 − 0 = − 0 . 7323 mS 4) Slope 3: Point 2: (0 V , 0 mA); Point 1: (1.2300 V , -1.1500 mA); C = (0 + 1 . 1500) ∗ 10 − 3 0 − 1 . 2300 = − 0 . 9350 mS 5) Slope 4: Point 2: (1.2300 V , -1.1500 mA); Point 1: (6.1820 V , -4.4850 mA); D = ( − 1 . 1500 + 4 . 4850) ∗ 10 − 3 1 . 2300 − 6 . 1820 = − 0 . 6735 mS 6) I-V Equation: It is clear from Fig. 6 that I-V relationship is piece-wise linear and, equation will be in accordance to that (only considering negati ve slopes of the graphs): i R =          Av R − 1 . 27( A − B ) , v R ≤ − 1 . 27 B v R , − 1 . 27 ≤ v R ≤ 0 C v R , 0 ≤ v R ≤ 1 . 23 D v R + 1 . 23( C − D ) , v R ≥ 1 . 23 (5) where i R and v R are the current in and the voltage across the non-linear element, respecti vely . Meanwhile, A, B , C and D are the slopes of the I-V curve. 7) Differ ential Equations: Follo wing the guidelines from source [10]: let us indicate as v 1 , v 2 and i L the voltage across capacitor C1, the voltage across capacitor C2 and the current in the inductor L, respectiv ely . By applying the Kirchhoff ’ s circuit laws and and considering I-V dependence formulas for a capacitor and an inductor , the state equations can be deri ved as follows: dv 1 dt = 1 C 1 ( v 2 − v 1 R − i R ) (6) dv 2 dt = 1 C 2 ( v 1 − v 2 R + i L ) (7) di L dt = − 1 L v 2 (8) 5 B. Lyapuno v Exponents T o experimentally verify chaos, the L yapunov exponents should be calculated. This type of exponents may be computed using the time series method as suggested by [9]. There can be se veral L yapunov exponents and, as long as any of them is positiv e, the system is said to be chaotic [9]. Prior to obtaining the L yapunov exponents, all of the differ - ential equations describing the system are scaled by p | L 1 C 2 | . It is required since the L yapunov exponent algorithms numer- ically con ver ge for , particularly , these time factors. At lower time constant coefficients, very small step sizes are needed to solve the differential equations, which, in turn, leads to unnecessary computing complications. It does not only take a lot of time, but sometimes may result in considerable errors [9]. Figure 10. Dynamics of Lyapuno v exponents The result is sho wn in Fig. 10, where the red curve corre- sponds to the largest L yapunov exponent. This line is above the x-axis for almost 1.7 time series simulation, meaning it is positi ve for just enough time. Referring back to the first paragraph in this section, the condition for chaos is satisfied. C. P ower Calculations Since both the current in the inductor and the voltage across it are random, their product, i.e. power , is also random. T o resolve this issue, a verage of all the instantaneous power values during 300 ms will be referred as ”power absorbed by a particular element”. It should be noted that the average value would still vary depending on the duration of the simulation. V ery small negati ve po wer shows that inductor does not consume much of the energy and, thus, is not an issue from a power perspecti ve. T able I demonstrates the summary of the po wer consumed be the proposed and original Chua’ s circuit. T otal po wer consumed by the proposed circuit during 300 ms of simulation is, then, 42 . 5781 mW . As it can be seem from the results, the most power is absorbed by the neg ati ve resistor components, which is constructed using Opamp. Consumption by energy storage elements, not including resistor R 8 , is so negligible T able I C O MPA R IS O N TA BL E F O R T H E P OW E R C ON S U M PT I O N Circuit elements Original circuit Memristor based circuit Energy storage elements 5.6464 mW 4.6099 mW Non-linear elements 4.8894 mW 6.2303 mW Negati ve resistor 32.8972 mW 31.7379 mW T otal power consumption 43.4330 mW 42.5871 mW that can be ignored. The y do not present a problem from a power perspectiv e for , particularly , this circuit, although they usually take up a lot of area in a chip. Original circuit differs from the proposed circuit in in the following way: 1) It has a memristor in-between the diodes to enhance the non-linearity and, hence, the overall randomness; 2) The parameter values ( C 1 , C 2 , L 1 , etc. ) differ . If the results are to be compared, the total power absorbed by the original circuit is greater by 0 . 8459 mW . This means that the proposed circuit with an HP memristor is 1.95 per cent more efficient than the original circuit in terms of the power consumption. Even if it is a small difference, it can be stated that the proposed circuit outperforms the original one. V . D I S C U S S I O N Simulation results confirm that the proposed circuit is, indeed, giving a random output signal as expected. FFT analysis show that there are many frequency components with different amplitudes in the output signal. This randomness is, essentially , coming from transient behavior of the circuit. Double scroll chaotic attractor also confirms that the system’ s behavior is chaotic. Ho wev er, to further study the dynamics of the circuit, Bifurcation diagrams should be constructed, which also help to determine at what exact v alues circuit becomes chaotic. V I . C O N C L U S I O N This paper has suggested one way of making a chaotic ran- dom number generator with an HP memristor . The proposed circuit was based on the classical implementation of Chua’ s circuit - two diodes as a non-linear element. It kept both of the diodes and integrated an HP memristor . As a result, it was able to maintain chaos and randomness exhibited by the circuit. This is what makes it special: mixing a classical implementation (diodes) of a non-linear element with a moder one (memristor). Since the circuit generates chaotic random signal, its output, potentially , can be used in applications such as image encryptions, secret communications and other v arious information safeties. There are two future suggestions: 1) The output signal of the circuit decays as time passes and loses its randomness. This should be fix ed, since ideally the circuit should remain chaotic fore ver; 2) Statistical tests should be conducted on the values of obtained random output signal to ensure that the circuit can be used in security applications. 6 R E F E R E N C E S [1] L. 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