High-Efficiency Self-Adjusting Switched Capacitor DC-DC Converter with Binary Resolution

environment for my research and study. Besides his outstanding expertise in both theoretical and practical matters, his amicable disposition and accessibility have provided for constructive and fruitful work. Professor Ben-Yaakov has taught me how to structure my ideas more rigorously and I believe over these past years that I have absorbed some of his creative approach to research. This thesis could not have been developed without the pioneering work and continual support of Meir Shashoua, co-founder of "K. S. Waves Ltd.", Tel-Aviv, Israel. I am grateful to Mr. Shashoua for his original ideas and asking questions that have periodically resurfaced in my mind and conducted me to sharper thinking. The material assistance from "K. S. Waves Ltd." is deeply appreciated and deserves special acknowledgement. I am greatly indebted to the graduate student Michael Evzelman for his friendship and optimism. He is always ready to discuss anything that could be connected with motorcycles, electronics or programming. My gratitude is also to Alexei Smirnov, the author of the NL5 circuit simulator, for his careful reading of the manuscript and help with English corrections. At the end of this study I wish to thank my mother -her love, understanding, support and sacrifices are always an encouragement to me. The purpose of a DC-DC converter is to provide a predetermined and constant output voltage to a load from a poorly specified or fluctuating input voltage source. Linear regulators and switching converters are two common types of DC-DC converters. In a linear regulator the output current comes directly from the power supply, therefore the efficiency is approximately defined as the ratio of the output voltage to supply voltage. It is obvious that a worse efficiency will be obtained when the supply voltage is much larger than the output voltage. Switching converters are more efficient than linear regulators due to intercepted energy transfer. This is done by periodically switching energy storing components to deliver a portion of energy from the power supply to the output. Switching DC-DC converters (except for resonant converters) can be divided into two large groups: inductive and capacitive. The inductive converters using one or several inductors have been a power supply solution in all kinds of applications for many years due to the wide variety of possibilities in current and voltage requirements. Generally, the inductors in such a converter are bulky, not realizable on-chip and are the cause of two difficult problems. One problem are high voltage spikes that must be damped or recuperated otherwise, the switches which are not rated for such constraints can blow, while the rest of circuit can be damaged. The other problem with inductive converters is a pulsating input current, which can produce an electromagnetic interference (EMI) from other equipment and conductor lines. This interference may penetrate into susceptible devices and lead to unreliable operation. So, the pulsating input current requires a special filter and sometimes shielding. All these factors increase the board space and inductive converter cost. The capacitive converters based on switched capacitors are widespread in applications requiring small power and no isolation between input and output. They feature relatively low noise, minimal radiated EMI, and in most cases are fabricated as integrated circuits which have made capacitive converters popular for use in power management for mobile devices. An additional goal of such converters is the option for unloaded operation with no need for dummy loads or complex control. However, capacitive converters suffer from inherent power loss during charging and discharging of a capacitor connected in parallel with the voltage source or another capacitor. Theory predicts that this power loss is proportional to the squared voltage difference taking place before the corresponding circuit has been configured. As a result, capacitive converters exhibit a rather high efficiency if the capacitors pre-charged to certain voltages are paralleled with components maintaining similar voltages. The most known type of capacitive DC-DC converter is called a charge pump; for historical reasons it is often considered to a step-up converter built from capacitors and diodes, which are used as switches. Nowadays, when charge pumps are built around transistor switches, their circuitry does not differ in principle from the step-down switched capacitor DC-DC converters. The cornerstone of both circuits is a reconfigurable array of switches and capacitors generally called "flying capacitors". These capacitors are charged from the input voltage and then discharged to the load thus providing charge transfer and a constant output voltage. It is a well-known phenomenon that when a capacitive converter operates at the target output to input voltage ratios, the efficiency is high and may exceed 90%. This is due to the fact that, at these voltage ratios, the capacitors do not see appreciable voltage variations. When the same capacitive converter operates between or outside the target voltage ratios, the efficiency drops dramatically. Obviously, in practice one would expect the conversion ratio to change and hence there is no way to escape the losses. However, there are several "lossless" techniques to provide regulation of the output voltage. In most cases, these techniques change the rate at which the charge is transferred to the output and this leads to an increased output voltage ripple. In general, capacitive converters feature a set of discrete target voltage ratios that can be contrasted with the continuous transfer function of inductive converters. The down side of capacitive converters is the larger number of switches and respective drivers complicating the converter circuitry. Another problem of capacitive converters is a high inrush current during start-up that must be limited by soft-start circuitry. "Discontent is the first necessity of progress." Switched Capacitor Converters (SCC) suffer from a fundamental power loss which is a severe limitation because of the common requirement to regulate output voltage. The power loss is due to the inherent energy dissipation when a capacitor is charged or discharged by a voltage source or another capacitor [1][2][3][4][5][6][7][8]. Hence, SCC exhibit rather high efficiency only when operating at the target voltages at which the voltage differences that charge and discharge the capacitors are small. Earlier studies attempted to overcome the power loss by proposing SCC with an increased number of target voltages [9][10][11][12][13][14]. However, the common disadvantage of these SCC is that the target voltages are spread apart. It is thus evident that there is a need and it will be highly advantageous to design a SCC that has a large number of target voltages that are spaced at high resolution over the range of interest and thereby improve the efficiency. Another desired feature is a simple way to increase the resolution only by changing the control scheme. In addition, it would be desirable to obtain a smooth transition from one target voltage ratio to another. It is yet another demand to regulate the output voltage while maintaining high efficiency. It would also be desirable to provide low output voltage ripple over a wide range of target voltage ratios. This work presents the theory that underlines the operation of the multi-target SCC and allows one to design new SCC satisfying the above requirements. The theory is based on the redundancy of the positional number systems [38][39][40][41][42], which is used to develop two new SCC classes providing binary and arbitrary resolution of target voltages. In these new SCC classes, the flying capacitors are automatically kept charged to radix-r-weighted voltages, while the gap between neighboring target voltages is defined by the resolution. Both the radix and the resolution can be made higher by increasing the number of flying capacitors. "The immediate effect is likely to be what it's always been -a spike in violence." The principle of a gradual change of energy in any physical system, and specifically in an electrical circuit, means that the energy stored in electric or magnetic fields cannot change instantaneously [1][2][3]. For the sake of simplicity, however, the assumption is made in transient analysis that the switching occurs quite instantaneously [4][5][6][7][8]. be the instant of time when switching starts, and two additional instants: just prior and just after switching be -= 0 t and + = 0 t respectively. In mathematical language, the value of the function ) 0 ( - f is the "limit from the left", as t approaches zero from the left, while ) 0 ( + f is the "limit from the right", as t approaches zero from the right. According to the above principle, the voltage (charge) of a capacitor just after switching is equal to the voltage (charge) just prior to switching: Defining an ideal switch as a zero-resistance device that gets opened or closed in zero time, we consider the charging circuit shown in Fig. , while the final voltages are: is observed again and, as in the previous case, the discharging of C 1 will be accompanied by an infinitely high current pulse during an infinitesimal time. This contradiction can be refuted since any circuit with a real capacitor has in practice some resistance and inductance connected in series. The series inductance is generally and is neglected in present analysis. The infinite current spike is prevented in the switched circuits shown in Fig. , this is: Rearranging the above equation: Now it can be simply integrated: The integration of both sides yields: Since the time constant So, the complete response is: Note that the first term in (2.1.10) is the natural response, while the second term is the forced response. Both terms and the complete response were calculated in MathCAD and are presented in Fig. 2.1.3 together with the following current, which is limited by The time constant may be easily found from Fig. , when ∞ → t . V s 1 This result justifies using an impulse function δ to represent the very large, approaching infinity, magnitude of the current pulse, applied for a very short (approaching zero) time interval, whereas their product stays finite, as shown in Fig. 2.1.4. The other switched circuit with the resistor R is shown in Fig. 2.1.2(b) and serves to discharge the capacitor C 1 (pre-charged to the voltage V S ) and simultaneously to charge the empty capacitor C 2 . To find the voltages across these capacitors, consider a bi-directional current flow and compose two first-order differential equations: (2.1.12) Take the Laplace Transform of both systems: The solutions in the Laplace domain are: Taking the Inverse Laplace Transform of both equations (2.1.14), we obtain the voltages in the time domain. To simplify the expressions we introduce the time constant ( ) The boundary values are: It is evident from (2.1.16) that the asymptotic limits are the same voltages v 1 (0 + ) = v 2 (0 + ) as derived in (2.1.3) The transient in the switched circuits considered in the previous section is accompanied by either an infinitely high pulse or an exponentially decaying current. Energy is lost in both cases; however, in each case the nature of energy loss is different. In the first case of the ideal switched circuit, it is common to presume that the energy loss is radiation caused by the infinitely high current pulse. The other case is more close to practice because the current is limited by the series resistor, which is heated and dissipates energy. As known, the energy stored in the capacitor is: Consider again the charging circuit in Fig. 2.1.1 (a), where the ideal capacitor C 1 is precharged to the voltage V 0 and holds an initial energy 2 , its square defines the energy loss: ( ) The same energy is dissipated as heat when the capacitor C 1 is charging through the resistor R as shown in Fig. 2.1.2(a). According to the Joule-Lenz law, the power is and its integrated value is the heating loss: In the particular case when 0 0 = V the final energy E 1 equals the dissipated (radiated) energy, therefore half of the energy delivered by the source is lost. This fact corresponds to the law of energy conservation and can be proved by taking the integral of the delivered power: The above considerations can be applied to the ideal discharging circuit in Fig. 2 V C E = . After the circuit has closed, the final energy is given by the voltages , while the energy loss: As in the previous case this energy loss should be compared with the heating loss when the energy is dissipated by the resistor during current flow. The corresponding switched circuit is shown in Fig. 2.1.2 (b). Substituting (2.1.16) into the power integral we obtain: ( ) So, the dissipated energy is equal to the energy loss found in (2. The initial energy in this case 2 2 To know the final energy we have to find new values of the final voltages using the charge conservation law: ( ) ( ) Substitution of these values into (2.2.1) yields ( ) . The energy loss will be again proportional to the squared voltage difference: ( ) As mentioned above, SCC feature a set of discrete target voltages that can be contrasted with the continuous transfer function of inductor-based converters. This set of target voltages is closely related to the SCC efficiency over the full range of input voltages [26]. The target voltage is the no-load output voltage and is equal to some multiple n of the input voltage. In general, n is a function of the number of flying capacitors and the way that they are connected to the input and output and among themselves. Such interconnections are called hereinafter "SCC topologies". So, the target voltage is independent of the values of the flying capacitors and determined only by SCC topology, while n can be a positive or negative rational number [11], [14], [18]. At each target voltage, the SCC efficiency reaches a maximum value and drops when the desired output voltage lies between or outside the target voltages. For example, the commercial SCC [12] operates at the fixed output voltage V o = 1.8V and has two peaks of efficiency shown in Fig. 2.3.1. This SCC can be switched between two conversion ratios n = 1/2 and 2/3. When the input voltage is lower than about 3.5V, the conversion ratio is set to n = 2/3 and for input voltage above 3.5V it is switched to n = 1/2. Consequently, high efficiency is observed when the input voltage is about 2.7V (1.8/(2/3)) and at 3.6V (1.8/(1/2)). When the SCC operates between and outside these two target voltages, the efficiency drops as the difference between the output voltage and 1.8V increases. Any SCC can be modeled by an equivalent circuit that includes a voltage source V TRG and an internal resistance R eq as depicted schematically in Fig. It is clear, that the highest efficiency will be achieved if n is manipulated such that V TRG is made only slightly higher than the desired V o , leaving a small voltage drop on R eq . It is further clear that the best results can be obtained if the resolution by which n is altered is high and when its values are evenly spaced. Previous attempts to improve the efficiency by changing n on-thefly gave SCC configurations with a limited number of target voltages, namely with a coarse resolution of n. As a result, the efficiency drops significantly when the required n is in between the sparsely spread values of n. and R eq are fixed. In this case, the output voltage will not be regulated and will depend on V in and the load resistance R o . In this situation, it is advantageous to reduce R eq as much as possible to keep the efficiency high. Regulation can be achieved by either changing n or R eq (or both) [11]. The no-load voltage can be changed by changing on-the-fly the SCC topology and hence altering n, while R eq can be changed by adding resistance to the circuit e.g. by placing a linearly controlled MOSFET in the charging/discharging paths. Other possibilities to vary R eq are frequency change, frequency dithering and duty cycle control [13], [14]. "To improve is to change, to be perfect is to change often." In this section we derive the equivalent resistor expression for a simple case of voltage follower SCC depicted in Fig. 2.4.1, where R 1 and R 2 represent the "on" resistances of S 1 and S 2 respectively, while ESR is the series loss component of the flying capacitor C. The analysis is based on the generic and unified average model [26], [54] and made under the assumption that the output capacitor C o is sufficiently large, so that the output voltage ripple is neglected. Let V 1 and V 2 be the initial voltages across the capacitor C at the instants just prior to its connection to the voltages V in and V o respectively. Since the initial voltages can be replaced by the voltage sources, the capacitor C is charged by It is convenient to consider a generic charge/discharge circuit presented in Fig. 2 The switch S remains turned on during t S , so that both the energy dissipated by R and the transferred charge can be found using we can relate the above results to the voltage follower SCC in Fig. 2.4.1. The energy losses for each interval t 1 and t 2 are: ( ) In the steady state, the charge transferred during t 1 and t 2 is the same: Rearranging the terms of (2.4.5) yields: These voltage differences are substituted into (2.4.3), so that: Because the total energy loss Or after simplification: The total average power loss , so that: we conclude that the equivalent resistor is: For the particular case of β 1 = β 2 = β, the general expression (2.4.12) is reduced to: Assuming zero dead time and RC T s 2 = β , we can rewrite (2.4.13) as: Consider an extreme case of (2.4.14) when 0 This seemingly surprising result has a simple explanation. In the circuit of Fig. 2.4.1 the momentary current during each switching phase is 2I o (to make the average current I av = I o ), so that the losses are ( ) = . An additional extreme case for (2.4.13) is ∞ → β that results in R eq reduced to the well known expression: To demonstrate how both the above limits (2.4.15) and ( 2 ( ) . This fact can be simply explained since the time constant τ = RC, β = t/τ and the transient is quite finished after t = 5τ. Thus, (2.4.16) corresponds to the case of full charging/discharging of the flying capacitors. On the other hand, when 0 → β , the term In practice, R is relatively small and one can get ∞ → τ with sufficiently large flying capacitors. So, (2.4.15) corresponds to the case of partial charging/discharging while the current through R is constant. "It is through science that we prove, but through intuition that we discover." As mentioned above, the total SCC efficiency over the full range of input voltages can be improved by increasing the number of target voltages. In order to design a step-down SCC with closely spaced multiple target voltages, we have developed an Extended Binary (EXB) representation. According to this approach, the flying capacitors are automatically kept charged to binary weighted voltages and, consequently, the resolution of the target voltages is binary. The resolution can be made higher by increasing the number of flying capacitors. For the resolution n, consider a set of fractions M n in the range (0, 1) with odd numerators 1, 3, …, 2 n -1 and denominator 2 n . Any fraction M n can be represented in the form: where A 0 can be either 0 or 1, and A j can take any of three values -1, 0, 1. The expression (3.1.1) defines the Extended Binary (EXB) representation, which differs from its conventional binary counterpart since A j can be -1. Because of the three values -1, 0, 1 for A j , the EXB representation is akin to binary signed-digit (BSD) representation of integer numbers, for example: As seen from (3.1.2), the BSD representation for a given integer is not unique and this property is used mostly for carry-save fast computer arithmetic. We have modified the BSD representation for fractions M n limited in the range (0, 1). As a result, the coefficient A 0 in the EXB representation (3.1.1) is not allowed to be "1". Because of the redundancy that comes from the BSD representation, any fraction M n can be represented by a number of EXB codes, for example: In the next section we provide a simple procedure to spawn all the EXB codes for a given fraction M n . This procedure will be followed by a number of corollaries, which are crucial to define and explicate the operation of the EXB based SCC. "Get your facts first then you can distort them as you please." In order to generate all the EXB codes corresponding to a given fraction M n within the range (0, 1), we use a procedure that involves adding and subtracting the coefficient A j = 1 to the conventional binary code of M n . Spawning the EXB codes. This procedure is iterative and starts from any A j = 1 in the conventional binary code of M n . Adding "1" to this A j results in "0" and "1" from the left as the carry. To maintain the value of M n we subtract "1" from the obtained A j , and spawn thereby a new EXB code. The procedure repeats for all A j = 1 in the original code and for all A j = 1 in each spawned EXB code. In example (3.2.1), four alternative EXB codes are spawned from the conventional binary code of M 3 = 3/8. The EXB codes for other fractions M n with the resolution n = 1…3 are summarized in Table 3.2.1. Corollary 1: For the resolution n, the minimum number of EXB codes is n + 1. This is because each of the "1"s in the conventional binary code with resolution n generates a new EXB code and a carry. Further iterations cause the carry to propagate, so that each "0" in the conventional binary code is turned to "1", which is also operated on to spawn a new code. So, the minimum number of codes is the original code plus n that is, n + 1. Each A j = 1 in either the conventional binary or spawned EXB code yields at least one A j = -1 in the same position j of another EXB code. This is because the spawning procedure involves subtracting "1" from A j = 0. Both the above corollaries are very important and, as detailed in the following, provide the self-adjusting target voltage M n •V in at the output of the EXB based SCC, irrespectively of the values of the used capacitors. "The true delight is in the finding out rather than in the knowing." Due to the spawning procedure described in the previous section, we have derived important properties of the EXB codes. However, from the viewpoint of performance, this procedure is slow because each EXB code of M n is obtained by the series, digit-by-digit adding and subtracting the coefficient A j = 1. The alternative combinatorial method proposed in this section is parallel, and therefore faster than the previous one. According to the definition, the EXB representation of M n contains n coefficients A j , which can take any of three values: -1, 0, 1. We consider all combinations of these values arranged at n positions as a matrix M of 3 n rows by n columns. This matrix is obtained by the full factorial design, where each level is 3, and the number of levels is n. Note that M defines the representations of the numbers 2 in the balanced ternary number system. For the sake of an exact integer calculation, we multiply both the sides of the EXB formula (3.1.1) by 2 n . As a result each EXB weight and we have n powers of two, which compose a column-vector K of length n. Multiplying the matrix M by this vector yields a column-vector F of length 3 n . To indicate A 0 = 0 and A 0 = 1 in the EXB codes we introduce a column-vector B of the same length. The positive elements of the vector F correspond to A 0 = 0 and transferred to the vector B as zeros, while the negative elements correspond A 0 = 1 and transferred as ones. We complete the negative elements of the vector F to the positive by adding 2 n and obtain a column-vector F'. So, this vector will contain 3 n elements, which are the numerators The search for certain m results in several row indexes, while the same rows of B and M compose the EXB codes for given M n . For the resolution 3 = n , this combinatorial method is demonstrated step-by-step in the following, while the full factorial design matrix and the used vectors are shown in Fig. 3.3.1. 1) All combinations of -1, 0, 1 in 3 positions are given by the full factorial design matrix M of 3 3 rows by 3 columns obtained with the MATLAB command fullfact([3 3 3])-2. 2) The column-vector K = [4; 2; 1], so that the product of M and K is the column-vector F of length 3 3 comprising the numbers from 1 -2 3 through 2 3 -1. 3) The positive numbers of the vector F are transferred to the vector B as zeros, while the negative numbers are transferred as ones. 4) At the same time the negative numbers in F are completed to the positive by adding 2 3 , so that the completed vector F' contains the numbers from 0 through 2 3 -1. Comparing the obtained codes with the codes presented in Table 3.2.1 we conclude that the combinatorial method yields the same result as the procedure spawning the EXB codes. For certain EXB fraction M n , we consider a step-down SCC system that includes a voltage source V in , a set of n flying capacitors C j and an output capacitor C o connected in parallel with the load R o . These components are connected in accordance with the EXB codes of M n in such a way that C o is continuously charged. In particular, the EXB coefficient A 0 is responsible for the connection of V in , while the connection of each flying capacitor C j is determined by the EXB coefficient A j . Irrespective of the connection of V in the flying capacitors C j are always connected serially. To configure the EXB based SCC topologies we use the following rules: As an example we translate all the EXB codes of M 3 = 3/8 presented in Table 3 We assume that in each SCC topology of Fig. 3.4.1, the flying capacitors C 1 , C 2 and C 3 Multiplying V in and these voltages by the corresponding coefficients A 0 , A 1 , A 2 and A 3 in the EXB codes of M 3 = 3/8, we find their algebraic sum, which is equal to the target voltage Generally, translating all the EXB codes of certain M n to the SCC topologies, we ought to obtain the target voltage V o = M n •V in , under the condition that each flying capacitor C j keeps the voltage V j = 2 -j •V in . In the following we show that all the voltages in the EXB based SCC are self-adjusting to the above specified values and this property is due to Corollaries 1 and 2 of the procedure for spawning the EXB codes. 3.5 Self-adjusting voltages in the EXB based SCC "Make everything as simple as possible, but not simpler." In this section we consider the EXB based SCC under the assumption that in each SCC topology all the capacitors voltages remain constant but of unknown values. Applying Kirchhoff's Voltage Law (KVL) to w different SCC topologies we compose a system of w linear equations. If this system has a unique solution, we obtain the target and binary weighted voltages across the output and flying capacitors respectively. The KVL states that the algebraic sum of all voltages around any closed path in a circuit is zero. Any SCC topology is a closed path circuit because the flying capacitors are charged and discharged thus providing charge transfer. The output voltage of the SCC is assumed to be constant and the KVL is applied to the voltages across the capacitors engaged in a SCC topology. The system of linear equations for both topologies of Fig. 3.5.1 is: The solution of (3.5.1) is trivial: Generally, a system of equations for the EXB based SCC may be composed directly from the corresponding EXB codes. As an example, we show that the EXB codes of M 3 = 3/8 lead not only to the SCC topologies of Fig. 3.5.2, but also to the system (3.5.3). The number of equations in (3.5.3) is identical to the number w of all the EXB codes of M 3 = 3/8 and equals to 5, while the number of unknowns is equal to 4 and defined as the resolution n = 3 plus one. Grouping the unknowns in (3.5.3) at the left hand side yields: The system of equations (3.5.4) contains two non-zero free terms as the negative value of V in . Generally, the connection of V in is provided by Corollary 1 of the procedure spawning the EXB codes as follows. Consider the conventional binary code of M n , where the coefficient A j takes either "1" or "0". Due to Corollary 1, the case A j = 0 is turned to A j = 1, which is used to generate the coefficient A 0 = 1 responsible for the connection of V in . So, the EXB based SCC is described by a system of linear equations which contains at least one non-zero free term. In linear algebra, such a system is called non-homogeneous. Returning to (3.5.4) we normalize it to V in : The conventional brief notation for (3.5.5) is Ax = b, where In order to investigate the solvability of (3.5.5) we supplement the coefficient matrix A with the vector b and form thereby the augmented matrix A1: (3.5.8) According to the Kronecker-Capelli theorem [31], [36], a non-homogeneous system has at least one solution if and only if the rank of its coefficient matrix A is equal to the rank of its augmented matrix A1. This theorem has a corollary that specifies the number of solutions. The solution is unique if and only if the rank the augmented matrix A1 equals the number of unknowns. If the rank of A equals the rank of A1, but is less than the number of unknowns, the system has an infinite number of solutions. If, on the other hand, the rank of A1 is greater than the rank of A, the system has no solutions. Note that the rank of any matrix is equal to the row rank and equal to the column rank, and as a consequence, the maximum number of linearly independent rows of a matrix is equal to the maximum number of its linearly independent columns. For the resolution n the number of columns in the matrix A is n + 1, while the number of rows is provided by Corollary 1 to be w ≥ n + 1. According to the above theorem we conclude that the rank of A as well as the rank of A1 must be equal to n + 1, which is exactly the number of unknowns. So, we have to prove rigorously that the procedure spawning the EXB codes provides exactly n + 1 linearly independent rows (or columns) in both the matrices A and A1. From a practical point of view the EXB based SCC with high resolution n > 16 will be very expensive for realization and therefore we suppose 1 ≤ n ≤ 16. For each n we calculated the rank of A and the rank of A1 numerically in MATLAB, and ensured that the procedure spawning the EXB codes leads to a system from n + 1 linearly independent equations, while its unique solution is M n . Giving a rigorous theoretical proof of this for any n is planned for future work. In the case of system (3.5.5), the rank of A is 4, which is equal to the rank of A1 and equal to the number of unknowns. Thus, system (3. Since solution (3.5.9) is unique, the voltages V j (j = 1…3) across the flying capacitors C j are self-adjusting to the specified values of 2 -j •V in , so that there is no need for any closed loop control scheme [48][49][50] to assure that these voltages are reached and hence the output will always self stabilize to the expected target voltage Generally, for a given EXB fraction M n with resolution n, there are two ways to provide the self-adjusting voltages One way is to configure only those SCC topologies, which correspond to n + 1 linearly independent equations. The other way is to introduce redundant SCC topologies in addition to the n + 1 mentioned above. By configuring these w ≥ n + 1 different SCC topologies periodically we provide continuous charge transfer and, consequently, current flow through the load. An intuitive explanation for this is that while the topologies change each flying capacitor goes through a sequence of charge and discharge. This is assured by Corollary 2 of the procedure spawning the EXB codes, which states that for each "1" in the EXB code there is at least one "-1" in the same position. This means that the theory predicts that in the EXB based SCC, all capacitors are going through the sequence of charge and discharge. According to the number w of different SCC topologies we introduce the same number w of time intervals t k , where k = 1, …, w. During the interval t k , the corresponding k-th topology does not change and repeats as depicted conceptually for M n = 3/8 in Fig. 3 , where p = 0, 1, 2, ... is the number of period. time T Irrespective of the order in which the topologies repeat, the voltages V j and V o eventually reach and stay at the specified values of 2 -j •V in and M n •V in even if the SCC starts with zero or arbitrary voltages across the capacitors or when it is subjected to a disturbance. Due to this property, the EXB based SCC can be considered to be hardware for solving a system of linear equations by an iterative method. "To every action there is always opposed an equal reaction." Output voltage ripple in the EXB based SCC can be reduced when the charging and discharging of each flying capacitor C j are interleaved. Since the connection polarity of C j is determined by the sign of coefficient A j , we can form an alternating sequence of EXB codes, where the sign of the next A j is opposite to the previous one. Evidently, a significant ripple reduction can be achieved by a balanced sequence, where the alternating nonzero coefficients A j are spaced with a constant number of zeros. As shown in the following, the balanced sequence can be formed by replicating some of the EXB codes. For the sake of an exact integer calculation, we multiply each EXB weight j where n is the number of columns. Multiplying B and Y element-by-element yields the weight matrix U. To introduce A j = ± 1 we use the same binary matrix B as exponent the for -1 and obtain thereby a sign matrix P. Having two matrices U and P we find their product M of size For the resolution n = 3, the matrices U and P are given in Table 3 Comparing Table 3.6.3 with Table 3.2.1 which contains all the EXB codes of the same M n , we conclude that each balanced sequence can be formed by replicating and further arranging these EXB codes. Since the sign of each A j (j >0) in Table 3.6.3 alternates, the charging and discharging of each flying capacitor C j are interleaved and this reduces output voltage ripple. Moreover, due to a constant number of zeros spacing nonzero A j the ripple reduction will be significant. The EXB based SCC in step-up mode "Algebra is generous; she often gives more than is asked of her." In this section, we demonstrate how the step-down EXB based SCC can be utilized for step-up conversion. Considering the fact that system (3.5.3) describing the step-down SCC with M 3 = 3/8 is solvable it should also be solvable if the indices of V o and V in are interchanged. Such a manipulation leads to the system (3.7.1) and from the hardware viewpoint means switching the input and output of the step-down SCC as depicted in Fig 3 .7.1. The solution of (3.7.1) is: Generally, the conversion ratios of the step-up EXB based SCC with resolution n are reciprocal to their step-down counterparts M n and defined by a set of fractions with numerator 2 n and denominators 1, …, 2 n -1. These fractions have no resolution in the common sense and behave as 1/x. For n = 1…5, the step-up conversion ratios 1/M n are depicted in Fig. 3.7.2. Note that the highest conversion ratio in this SCC embodiment is equal to 2 n . Although a number of step-up SCC with the conversion ratio 2 n have been proposed earlier [43][44][45][46], [52] there is no published report of a SCC with intermediate binary conversion ratios. "Perfection is achieved, not when there is nothing more to add, but when there is nothing left to take away." As shown above, for the EXB fraction with resolution n, we can spawn w ≥ n + 1 codes, which are translated to w different SCC topologies. Applying the KVL to these topologies yields a system of w linear equations with n + 1 unknowns. Since the self-adjusting voltages correspond to a unique solution of this system, the number of linearly independent equations in the system must be n + 1. Thus, we have wn -1 redundant equations, which can be eliminated as well as the corresponding SCC topologies. For the system written in matrix form we can apply the conventional Gaussian or Gauss-Jordan elimination. However, these methods modify the coefficient matrix, while the aim is to point out its linearly dependent rows. It is also desirable to obtain the expression for each redundant row, which can be produced by more complicated methods [34], [35] that use a memory matrix and special pivoting technique. Any nonzero matrix A can be reduced by Gaussian elimination to an infinite number of row echelon forms by using different sequences of row operations. However, all row echelon forms of A correspond to exactly one matrix, which is called the reduced row echelon form and obtained by Gauss-Jordan elimination. The proposed method to identify dependent rows of the coefficient matrix A is based on the fact that the row space of A is the column space of its transposed counterpart A', while the rank of both matrices is the same. For example: the EXB based SCC with conversion ratio M 3 = 3/8 is described by the system Ax = b, where: Transposing A yields: Subjecting A' to Gauss-Jordan elimination we obtain its reduced row echelon form: Let us consider in F the columns where "1" is leading; their indices correspond to the indices of independent rows of A. These rows can be identified simply when the matrix F is taken by absolute value and then summed over the columns. The resulting vector s will comprise elements greater than one (3.8.4), while their indices will be the indices of dependent rows of A. [ ] The only element in (3.8.4) that is greater than one is 3 which has index 4, so the fourth row of A can be safely eliminated. Since the flying capacitors in the EXB based SCC are always connected in series, the charge delivered in each SCC topology depends on the number of nonzero coefficients A j in the corresponding row of A. Sorting the rows of A by the number of zeros in descending order before executing the above elimination procedure allows one to reduce both the adjustment duration and the equivalent resistor (detailed in the following). In the above proposed EXB based SCC, the number of target voltages is dependent on the resolution n and equal to 1 2n . At each target voltage, the SCC efficiency reaches a maximum value. However, the efficiency drops when the desired output voltage lies between or outside the target voltages. This drawback can be alleviated by increasing the resolution n and, consequently, the number of flying capacitors. Another approach is to introduce one or several additional target voltages between neighbor EXB target voltages at the same number of flying capacitors. In order to realize this approach we have developed a Generic Fractional Number (GFN) representation, where the radix is not restricted by 2 as in the EXB representation, but can take an arbitrary integer value. In the GFN based SCC, the voltages across the flying capacitors are defined by the corresponding powers of the radix, while the resolution determines the gap between neighboring GFN target voltages. Both the radix and the resolution can be made higher by increasing the number of flying capacitors. For the resolution n and the radix r, consider a set of fractions N n (r) in the range (0, 1) with numerators 1, 2, …, r n -1 and denominator r n . Any fraction N n (r) can be represented in the next form: where r is an integer greater than one, A 0 can be either 0 or 1, and A j can take any of the values: -(r-1), …, -1, 0, 1, …, (r-1). Expression (4.1.1) defines the Generic Fractional Numbers (GFN) representation, which differs from the conventional high-radix representations (e.g. decimal) since A j can be negative. Because A j can take any of the values 1-r, …, r-1, the GFN representation is akin to the Generalized Signed Digit (GSD) representation, for example: As seen from (4.1.2), the GSD representation for a given integer is not unique and this property is used mostly for carry-save fast computer arithmetic. We have modified the GSD representation for the fractions N n (r) limited in the range (0, 1). As a result, the coefficient A 0 is not allowed to be "-1". Because of the redundancy coming from the GSD representation, any N n (r) can be represented by a number of GFN codes, for example N 2 (3) = 5/9: In the next section, we provide a simple procedure to spawn all the GFN codes for a given fraction N n (r). This procedure will be followed by a number of corollaries, which are crucial to define and explain the operation of the GFN based SCC. As mentioned above, the GFN code of N n (r) with non-negative coefficients A j is identical to the representation of N n (r) in the conventional number system with radix r. This code is called hereinafter the original code. In order to generate all the GFN codes corresponding to a given GFN fraction N n (r) within the range (0, 1), we use a procedure that involves adding and subtracting the coefficient A j = r -1 to the original code. Spawning the GFN codes. This procedure is iterative and starts from any A j > 0 in the original code of N n (r). Adding r -1 to this A j results in A j < r -1 and "1" from the left as the carry. To maintain the value of N n (r), we subtract r -1 from the obtained A j , and spawn thereby a new GFN code. The procedure repeats for all A j > 0 in the original code and for all A j > 0 in each spawned GFN code. In example (4.2.1), three alternative GFN codes are spawned from the original code of N 2 (3) = 4/9. The GFN codes for other N n (3) where n = 1, 2 are summarized in Table 4.2.1. Corollary 1: For resolution n, the minimum number of GFN codes is 1 This is because each of the A j > 0 in the original code with resolution n generates a new GFN code and a carry. Further iterations cause the carry to propagate, so that each "0" in the original code is turned to "1", which is also operated on to spawn a new GFN code. So, the minimum number of GFN codes is the original code plus n that is, 1 + n . Corollary 2: Each A j > 0 in either the original or the GFN code yields at least one A j < 0 in the same position j of another GFN code. This is because the spawning procedure involves subtracting r -1 from A j < r -1. Both the above corollaries are very important and, as detailed in the following, provide the self-adjusting target voltage N n (r)•V in at the output of the GFN based SCC, irrespectively of the values of the capacitors used. 3) The positive elements of the vector F are transferred to the vector B as zeros, while the negative elements are transferred to B as ones. 4) At the same time, the negative numbers in F are completed to positive by adding 3 2 , so that the completed vector F' contains the numbers from 0 through 3 2 -1. Comparing the obtained codes with the codes presented in Table 4.2.1 we conclude that the combinatorial method yields the same result as the procedure spawning the GFN codes. In particular, the GFN coefficient A 0 is responsible for the connection of V in , while each group j of 1 r flying capacitors C j is associated with the GFN coefficient A j . Irrespective of the connection of V in , the groups j are always connected in series. Within each group j, the type of connection of the flying capacitors C j is determined by the absolute value |A j | and its complement ∆ j = r -|A j | -1. In order to configure the GFN based SCC topologies we use the following rules. Table 4.4.1. We assume that within the group j = 1 engaged in each SCC topology of Fig. Let us now consider the more complicated case of N 2 (3) = 4/9, where the resolution n is increased to 2, while the radix r is not changed and equal to 3. In this case, we need two groups of two flying capacitors in each. These groups are numbered j = 1, 2 and associated with the C1.1 and find their algebraic sum, which is equal to the output target voltage Generally, translating all the GFN codes of certain N n (r) to the SCC topologies, we ought to obtain the target voltage V o = N n (r)•V in , under the condition that, within group j, each flying capacitor C jx keeps the voltage V j = r -j •V in . In the following we show that all the voltages in the GFN based SCC are self-adjusting to the above specified values and this property is due to Corollaries 1 and 2 of the procedure for spawning the GFN codes. The number of equations in (4.5.3) is equal to 4 and equal to the number of all GFN codes of N 2 (3) = 4/9. Adding one to the resolution n = 2 yields the number of unknowns equal to 3. Let us group the unknowns in (4.5.3) on the left hand side: System (4.5.4) contains two non-zero free terms as the negative value of V in . Generally, the connection of V in is provided by Corollary 1 of the procedure spawning the GFN codes as follows. Consider the original code of N n (r), where the coefficient A j can take only positive values 0, …, r -1. Due to Corollary 1 the case of A j = 0 is turned to A j = 1, which is used to spawn the coefficient A 0 = 1 responsible for the connection of V in . So, the GFN based SCC is described by a non-homogeneous system of linear equations. Returning to (4.5.4), we normalize it to V in : We consider (4.5.5) in the form Ax = b, where Supplementing A with b we form the augmented matrix A1 that allows us to investigate the solvability of (4.5.5). (4.5.8) According to the Kronecker-Capelli theorem [31], [36], a nonhomogeneous system has a unique solution if and only if the rank of its coefficient matrix A is equal to the rank of its augmented matrix A1 and equal to the number of unknowns. For the resolution n, the number of columns in the matrix A is n + 1, while the number of rows is provided by Corollary 1 to be w ≥ n + 1. According to the above theorem, we conclude that the rank of A as well as the rank of A1 must be equal to n + 1, which is exactly the number of unknowns. So, we have to prove rigorously that the procedure spawning the GFN codes provides exactly n + 1 linearly independent rows (or columns) in both the matrices A and A1. As mentioned above, the GFN based SCC uses ) 1 ( -⋅ = r n v flying capacitors. From a practical point of view, large values of ν imply that the SCC will be very expensive for realization and therefore we suppose 1 ≤ ν ≤ 30 as shown in Table 4.5.1. For each pair of n and r we calculated the rank of A and the rank of A1 numerically in MATLAB, and ensured that the procedure for spawning the GFN codes leads to a system of 1 + n linearly independent equations, while its unique solution is N n (r). Giving a rigorous theoretical proof of this for arbitrary values of n and r is planned for future work. In the case of the system of equations (4.5.5), the rank of A is 4, which is equal to the rank of A1 and to the number of unknowns. Thus, system (4.5.5) has a unique solution, which is found in the form x = A -1 b: Since (4.5.9) is unique, the voltages V j (j = 1…2) across each C jx within group j and the output voltage V o are self-adjusting to the specified values of 3 -j •V in and 4/9•V in . Generally, for a given fraction N n (r), there are two ways to provide the self-adjusting voltages V j = r -j •V in and V o = N n (r)•V in . One way is to configure only those SCC topologies, which correspond to 1 + n linearly independent equations. The other way is to introduce redundant SCC topologies in addition to the n + 1 mentioned above. By configuring these w ≥ n + 1 different SCC topologies periodically we provide a continuous charge transfer through the load. An intuitive explanation for this is that, while the topologies change, each group of flying capacitors goes through a sequence of charging and discharging. This is assured by Corollary 2 of the procedure for spawning the GFN codes, which states that for each A j > 0 in the GFN code there is at least one A j < 0 in the same position. This means that the theory predicts that, in the GFN based SCC, all groups of flying capacitors are going through a sequence of charging and discharging. As shown above, the step-down EXB based SCC can be simply modified to operate in step-up mode. In this section we demonstrate the same for the step-down GFN based SCC described earlier by system (4.5.3), which is solvable even if the indices of V o and V in are interchanged. Such a manipulation leads to the system of equations (4.6.1) and from the hardware viewpoint means switching the input and output of the SCC as depicted in The solution of (4.6.1) is: "Nothing is too wonderful to be true if it be consistent with the laws of nature." In this section we apply the charge conservation law and Kirchhoff's Voltage Law (KVL) to demonstrate that the SCC output voltage and the voltages across the flying capacitors converge to the target and the radix-r-weighted values respectively, under the condition that the charge redistributes immediately. This condition means, in particular, that the SCC load is disconnected, while all the capacitors and switches used are ideal. So, the considered SCC contains no resistive elements, while any SCC topology can be configured instantaneously and, as a consequence, a momentary transition from one SCC topology to another is allowed. The charge conservation law states that charge can neither be created nor destroyed, only transferred. Applying this law to a SCC, we conclude that when capacitors holding initial voltages are engaged in a certain SCC topology, the existing charge is redistributed proportionally between the capacitances, so that the final voltages are balanced. These final voltages can be used as initial voltages in further iterations when the SCC topology is changed. The KVL states that the algebraic sum of all voltages around any closed path of a circuit is zero. Since any SCC topology is a closed path circuit, we apply the KVL to the final voltages across the engaged capacitors. Due to the input voltage source V in engaged in some SCC topologies, the KVL algebraic sum can be equal to either V in or zero. Designating the current and next iterations by i and 1 + i , we introduce a total number m of capacitors in the 1 + i iteration and express the final voltage unknowns, so it is solvable in principle. Solving (5.1.1), we obtain the final voltages for use as the initial conditions in the next iteration. The iterations are done while the SCC topologies change according to either the EXB or the GFN codes. Because the SCC operation is determined by a periodic repetition of SCC topologies, at some iteration the steady-state needs to be reached. It is important to distinguish between the terms "equilibrium" and "steady-state". Because of the ideal components that have been used, a solution of (5.1.1) assumes the equilibrium or charge (voltage) balance immediately after the SCC topology has been configured. The steadystate for the unloaded SCC with ideal components implies a constant (target) output voltage, while the charge transferred to the output capacitor after some iteration is zero. The number of iterations needed to reach the steady-state defines the adjustment duration. As an example, we consider the EXB based SCC with the conversion ratio M 3 = 3/8. The input voltage source V in is engaged (A 0 = 1) in the SCC topology depicted in Fig. where 1 1 are the final voltages. The total number of capacitors engaged in the SCC topology of Fig. The expressions (5.1.2) and (5.1.3) compose the system of 4 1 = + m linear equations with 4 unknowns. For given voltages in V and i k V grouped on the right hand side, we obtain: Because A 2 = 0, the capacitor C2 is disengaged and consequently Rewriting the system of equations (5.1.4) in matrix form: The total number of capacitors engaged in the SCC topology of Fig. 5.1.1(b) did not changed from m = 3. Applying the charge conservation law we have three equations of kind As in the previous case we group the given voltages of (5.1.7) on the right-hand side and obtain the system of 4 1 = + m linear equations with 4 unknowns: (5.1.8) Rewriting (5.1.8) in matrix form, we have: The coefficient matrix in (5.1.9) is formed in the same manner as in (5.1.5) using the EXB code {0 1 -1 1} and its resolution n = 3. Solving (5.1.9), we obtain the voltages which are substituted as the initial conditions in the next iteration. Using the above technique, we have conducted a convergence analysis of the considered SCC in MATLAB 7.1. The iterations were done for the EXB codes shown in Table 5.1.1. Table 5.1.1 For the sake of convenience, we set the input voltage , the identical flying capacitors F 7 . Let us now consider the case when the elimination procedure described in Section 3.8 is executed for the EXB coefficients A j (j >0) sorted by the number of zeros in descending order, so that the total capacitor in each SCC topology is increased. The result of this elimination is presented in Table 5.1.2, while the output voltage converging to the target value at zero initial conditions is depicted in Fig. 5.1.10. Table 5.1.2 "There exists everywhere a medium in things, determined by equilibrium." The preceding studies [15][16][17][18][19][20][21][22][23][24][25] prove that the power loss in a SCC can be modeled by a single equivalent resistor R eq . In this section we derive R eq for the EXB based SCC employing the periodic charge balance condition for each flying capacitor. The derivation is based on the generic and unified average model [26], [54]. Since any SCC in practice comprises parasitic resistances, the charge Q is transferred by an exponentially decaying current , where R is the total parasitic resistance. For a time interval t 1 , we consider the current ) (t i as an average (5.2.3) We consider a particular solution of (5.2.2) when I 4 is equal to zero. In practice this means that the fourth row in Table 5.2.2 is eliminated and consequently, the fourth SCC topology is not configured at all. For each SCC topology we can find a total capacitor C k and a total resistor R k , which are substituted to Assuming an identical on-resistance r for all switches and neglecting other parasitic resistances (e.g. ESR), we define the total on-resistance as r R 4 = . Since the flying capacitors are always connected in series, the total capacitors C k can be found using a number of non-zero coefficients A j ) 0 ( > j in Table 5 So, the equivalent resistor for the SCC conversion ratio M 3 = 3/8 is: = we can rewrite (5.2.6) in the following form: When beta tends to zero, the expression (5. Assuming an identical total resistor R in the SCC topologies and using Table 5.2.3 and Table 5.2.4, the equivalent resistor expressions were derived for all the ratios M n , n = 1, …, 3 as presented in Table 5.2.5. An important issue in this derivation is that the same equivalent resistor is obtained for a pair of complementary conversion ratios M n and 1 -M n . Table 5.2.5: Equivalent resistors for all the ratios M n , n = 1, …, 3. Equivalent resistor expression eq R 0 lim 6.615 5.42 5.428 4.82 "Science is what we understand well enough to explain to a computer. Art is everything else we do." Donald E. Knuth The adjacent switches in the cascade allow either capacitor to be disabled, while the opposite switches can parallel a capacitor with the neighbor. So, this cascade provides not only three types of connections {-1, 0, 1}, but can also be used for building the GFN based SCC. Using the double-bridge cascade, four additional switches and one additional capacitor, we compose the simulation circuit of the EXB based SCC with resolution n = 3 as depicted in Fig. 6.1.2. The simulations are done in the PSIM 7 simulator especially designed for power electronics, motor control, and dynamic system. Some of its advantages include fast simulation and lack of convergence problems. The PSIM bidirectional switches are ideal, i.e. have zero internal resistance, whereas the calculations done in the previous section assume an identical onresistance r = 1.2 Ω of all the switches. So, we need to introduce sub-circuits that comprise the ideal switch and a series resistor of 1.2 Ω as shown in Fig. 6.1.3. To verify the equivalent resistor values given in Rearranging (6.1.1) we obtain the equivalent resistor as: For each ratio from M 3 = 1/8 through M 3 = 7/8, the values of V o measured at t = 50ms and the values of R eq calculated according to (6.1.2) are summarized in Table 6.1.1. The averaged values of R eq are presented in Table 6.1.2. These values are found to be in excellent agreement with their theoretical counterparts given in Table 5.2.5. As in the previous section we run the simulations for the EXB codes given in Table 5. The values of V o measured at t = 0.2s and the values of R eq calculated according to (6.1.2) for both conversion ratios 1/M 3 = 8/3 and 1/M 3 = 8/5 are summarized in Table 6.2.1. As seen from Table 6.2.1, the value of R eq for 1/M 3 = 8/3 is greater then for 1/M 3 = 8/5. This can be explained by considering the coefficients A 0 in the EXB sequences of M 3 = 3/8 and M 3 = 5/8 (Table 5.2.3). When A 0 = 1, the load is connected and therefore the EXB sequence where the number of A 0 = 1 is large provides low R eq . The EXB sequence of M 3 = 5/8 comprises three A 0 = 1, while the sequence of M 3 = 3/8 comprises two, so the value of R eq for 1/M 3 = 8/3 is expected to be greater. The switches used in the above simulations are bidirectional, however from a practical point of view, these switches are expensive. In this section we examine the feasibility of replacing some bidirectional switches with unidirectional devices, which comprise a diode between the terminals (for example a MOSFET). When this diode is forward biased the regular operation of the SCC can be disturbed. So, we need to check the polarity of voltages across all the switches. In the case of unipolar voltages, the corresponding switches can be unidirectional. The efficiencies measured for the step-down EXB based SCC are presented in Fig. at R eq /V TRG , from which R eq can be calculated. The experimentally obtained values of R eq are presented in As mentioned above, output voltage regulation of a SCC can be achieved by changing the equivalent resistor R eq . We propose here two alternative approaches that are compatible with the structures of the EXB and GFN based SCC. In these SCC, it would be desirable to keep the voltages across the capacitors at their nominal values and not change them by partial charges or discharges. One approach to accomplish this is to use dithering that is, switching from one transfer ratio to another. In the regular one ratio mode, the SCC will scan over all the codes that correspond to the desired conversion ratio M n . For conversion ratios which are in between the discrete M n values one can dither between two neighboring ratios as depicted in Fig. 7.5.1. "Never express yourself more clearly than you are able to think." An EXB fractional representation is proposed and extended to the general radix case defined as GFN. In the case of the EXB, the radix is 2, while the general GFN can be defined for any radix r. Hence, the particular GFN case of r = 2 and the corresponding fractions N n (2) is in fact the EXB case. Based on these new fractional representations, a novel procedure is proposed for the design of high resolution multi-target SCC that emulate the EXB and GFN codes. It is shown that these SCC can be considered as hardware computational systems that solve a set of equations determined by the EXB, or in the general case, by the GFN representations. It is further shown that, for a given number of capacitors, one can generate many target voltages by configuring the flying capacitors interconnections according to different EXB or GFN codes. These codes are used to derive the equivalent resistor, which defines both the output voltage drop and the power loss due to conversion inefficiencies. The experimentally obtained values of the equivalent resistor were found to be in good agreement with both the theoretically predicted values of R eq and those obtained in simulations. The new theoretically supported concepts were verified by simulation and experiment for static and dynamic responses. The experiments were conducted on the step-down and step-up EXB based SCC. Several control schemes were tested, including linear and dithering approaches to provide continuous regulation of the output voltage. Both of the proposed control approaches were found to function properly, however the dithering scheme gave rise to a higher output ripple. This could be explained by the fact that in this control method the SCC has to be reconfigured dynamically between two M n values. Notwithstanding the good results, a number of theoretical issues are still open and require further investigation. Although some realizations of the proposed SCC have been described by way of illustration, they can be put into practice with many modifications that are within the scope of application engineers. .2.5 we run the simulations for the EXB codes given in Table 5.2.3 and measure the output voltage V o for different load resistances R o = 100, 200, …, 500Ω when the SCC has reached the steady-state. -4 -5 -5 -6 -7 - -5 -4 -5 -6 -7 -8